DVP-ES3 Series Programming Manual _6 6-164 Interrupt Maskable interrupts Description Bit No. number SR I100 External interrupt: input X0 is rising-edge triggered. SR624 0 I101 External interrupt: input X1 is rising-edge triggered. 1 I102 External interrupt: input X2 is rising-edge triggered. 2 I103 External interrupt: input X3 is rising-edge triggered. 3 I104 External interrupt: input X4 is rising-edge triggered. 4 I105 External interrupt: input X5 is rising-edge triggered. 5 I106 External interrupt: input X6 is rising-edge triggered. 6 I107 External interrupt: input X7 is rising-edge triggered. 7 I108 External interrupt: input X10 is rising-edge triggered. 8 I109 External interrupt:
input X11 is rising-edge triggered. 9 I110 External interrupt: input X12 is rising-edge triggered. 10 I111 External interrupt: input X13 is rising-edge triggered. 11 I112 External interrupt: input X14 is rising-edge triggered. 12 I113 External interrupt: input X15 is rising-edge triggered. 13 I114 External interrupt: input X16 is rising-edge triggered. 14 I115 External interrupt: input X17 is rising-edge triggered.
15 I200 High-speed comparison interrupt 1 for the hardware high-speed counter 1 SR625 0 I201 High-speed comparison interrupt 2 for the hardware high-speed counter 1 1 I202 High-speed comparison interrupt 3 for the hardware high-speed counter 1 2 I203 High-speed comparison interrupt 4 for the hardware high-speed counter 1 3 I210 High-speed comparison interrupt 1 for the hardware high-speed counter 2 4 I211 High-speed comparison interrupt 2 for the hardware high-speed counter 2 5 I212 High-speed comparison interrupt 3 for the hardware high-speed counter 2 6 I213 High-speed comparison interrupt 4 for the hardware high-speed counter 2 7