2 Functions of Devices in DVP-PLC 2. Parameters for D1144: DVP-PLC Application Manual 2-104 Device No.
Function M1146 “Target frequency reached” flag for Y0 adjustable pulse speed acceleration/deceleration M1147 “Decelerating” flag for Y0 adjustable pulse speed acceleration/deceleration M1148 “Function completed” flag for Y0 adjustable pulse speed acceleration/deceleration M1149 “Counting temporarily stops” flag for Y0 adjustable pulse speed acceleration/deceleration M1154 “Enabling deceleration” flag for Y0 adjustable pulse speed acceleration/deceleration D1030 The lower 16 bits in the 32-bit data register for accumulative Y0 output pulses D1031 The higher 16 bits in the 32-bit data register for accumulative Y0 output pulses D1144 Starting No.
of the register (D) for Y0 adjustable pulse speed acceleration/deceleration D1154 Recommended value for indicated gap time of deceleration(10 ~ 32,767 ms) D1155 Recommended value for indicated gap frequency of deceleration (-1 ~ -32,700 Hz) Index Function + 0 Total number of sections (n) (max.
10) + 1 Currently executed section (read only) + 2 Start frequency of the 1st section (SF1) + 3 Gap time of the 1st section (GT1) + 4 Gap frequency of the 1st section (GF1) + 5 Target frequency of the 1st section (TF1) + 6 The lower 16 bits of the 32 bits for the target number of output pulses in the 1st section (SE1) + 7 The higher 16 bits of the 32 bits for the target number of output pulses in the 1st section (SE1) + 8 Start frequency of the 2nd section (SF2); Cannot be the same as TF1 + 9 Gap time of the 2nd section (GT2) + 10 Gap frequency of the 2nd section (GF2) + 11 Target frequency of the 2nd section (TF2) + 12 The lower 16 bits of the 32 bits for the target number of output pulses in the 2nd section (SE2) + 13 The higher 16 bits of the 32 bits for the target number of output pulses in the 2nd section (SE2) :
: + n*6 + 2 Start frequency of the nth section (SFn); Cannot be the same as the start frequency of the n-1th section (TFn-1) + n*6 + 3 Gap time of the nth section (GTn) + n*6 + 4 Gap frequency of the nth section (GFn) + n*6 + 5 Target frequency of the nth section (TFn) + n*6 + 6 The lower 16 bits of the 32 bits for the target number of output pulses in the nth section (SEn) + n*6 + 7 The higher 16 bits of the 32 bits for the target number of output pulses in the nth section (SEn)