6 Application Instructions API 00-49 Operands: S : Source device for conversion D : Device for storing the conversion result Explanations: 1. See the specifications of each model for their range of use. 2. Flags: M1081 (FLT instruction function switch); M1020 (zero flag); M1021 (borrow flag); M1022 (carry flag) 3. D will occupy 2 consecutive devices 4. When M1081 is Off, BIN integer is converted into binary floating point value. At this time, S of the 16-bit instruction, FLT, occupies 1 register and D occupies 2 registers. b) If the absolute value of the conversion result ＜ min. floating value, carry flag M1021 = On. a) If the absolute value of the conversion result ＞ max.
floating value, carry flag M1022 = On. c) If the conversion result is 0, zero flag M1020 = On. 5. When M1081 is On, binary floating point value is converted into BIN integer (digits after decimal point are left out). At this time, S of the 16-bit instruction, FLT, occupies 2 registers and D occupies 1 register (action same as that of INT instruction). a) If the conversion result exceeds the range of BIN integer available in D (for 16-bit: -32,768 ~ 32,767; for 32-bit: -2,147,483,648 ~ 2,147,483,647), D will obtain the maximum or minimum value and carry flag M1022 = On. b) If any digits is left out during the conversion, borrow flag M1021 = On. c) If S = 0, zero flag M1020 = On.
d) After the conversion, D stores the result in 16 bits. Program Example 1: 1. When M1081 = Off, the BIN integer is converted into binary floating point value. 2. When X10 = On, D0 (BIN integer) is converted into D13 and D12 (binary floating point value). 3. When X11 = On, D1 and D0 (BIN integer) are converted into D21 and D20 (binary floating point value). 4. If D0 = K10, X10 will be On. The 32-bit value of the converted floating point will be H41200000 and stored in 32-bit register D12 (D13).
DVP-PLC Application Manual 6-74 API Mnemonic Operands Function 49 D FLT P Convert BIN integer to binary floating point Type OP Bit Devices Word Devices Program Steps X Y M S K H KnX KnY KnM KnS T C D E F FLT, FLTP: 5 steps DFLT, DFLTP: 9 steps S * D * PULSE 16-bit 32-bit EH3 EH3 EH3 ES EX SS SA SX SC EH SV ES EX SS SA SX SC EH SV ES EX SS SA SX SC EH SV SV2 SV2 SV2