8 Application Instructions API 100-149 receiving completed M1123 Receiving completed and flag reset PLC VFD-S, PLC sends: 01 06 2000 0012 02 07 Registers for sent data (sending messages) The error checksum CRC CHK (0,1) can be calculated by CRC instruction (in 8-bit mode, M1161 = On). M1000 CRC checksum: 02 H is stored in the lower 8 bits of D106 and 07 H in the lower 8 bits of D107, Remarks: 1. The format of RTU mode with a communication datum 2. CRC checksum starts from Address and ends at Data content. The operation of CRC checksum: Step 1: Make the 16-bit register (CRC register) = FFFFH Step 2: Exclusive OR the first 8-bit byte message instruction and the low-bit 16-bit CRC register.
Store the result in CRC register. Step 3: Shift the CRC register one bit to the right and fill 0 in the higher bit. Step 4: Check the value that shifts to the right. If it is 0, store the new value from Step 3 into the CRC register, Step 5: Repeat Step 3 ~ 4 and finish calculating the 8 bits. otherwise, Exclusive OR A001H and the CRC register, and store the result in the CRC register. Step 6: Repeat Steps 2 ~ 5 for obtaining the next 8-bit message instruction until all the message instructions are calculated. In the end, the obtained CRC register value is the CRC checksum. Be aware that CRC checksum should be placed in the checksum of the message instruction.
DVP-PLC Application Manual 8-19 Process received data RST M1123 Register DATA Explanation D100 low 01 H Address D101 low 06 H Function D102 low 20 H Data address D103 low 00 H D104 low 00 H Data content D105 low 12 H D106 low 02 H CRC CHK 0 D107 low 07 H CRC CHK 1 CRC D100 K6 D106 START Time interval Address Communication address: 8-bit binary Function Function code: 8-bit binary DATA (n-1) Data content: n × 8-bit data ……. DATA 0 CRC CHK Low CRC checksum: 16-bit CRC checksum consists of 2 8-bit binaries CRC CHK High END Time interval