9 Application Instructions API 150-199 API 183 Operands: S 1 : Matrix source device 1 S 2 : Matrix source device 2 D : Operation result n : Array length Explanations: 1. Range of n : K1 ~ K256 2. S 1 , and S 2 designate KnX, KnY, KnM and KnS; D designates KnYm KnM and KnS 3. SA/SX/SC can designate n = 4. EH/EH2/SV/EH3/SV2 can designate n ≦ 4 . 4. See the specifications of each model for their range of use. 5. The two matrix sources S 1 and S 2 perform matrix ‘XNR’ operation according to the array length n . The result is stored in D . 6. Operation rule of matrix ‘XNR’: The result will be 1 if the two bits are the same. The result will be 0 if the two bits are different. Program Example:
When X0 = On, the 3 arrays of 16-bit registers D0 ~ D2 and the 3 arrays of 16-bit registers D10 ~ D12 will perform a matrix ‘XNR’ operation. The result will be stored in the 3 arrays of 16-bit registers D20 ~ D22. X0 b15 b0 0 0 0 Before Execution MXNR 0 0 0 After Execution 1 1 1 DVP-PLC Application Manual 9-99 Mnemonic Operands Function MXNR P Matrix ‘XNR’ Operation Type OP Bit Devices Word Devices Program Steps X Y M S K H KnX KnY KnM KnS T C D E F MXNR, MXNRP:
9 steps S 1 * * * * * * * S 2 * * * * * * * D * * * * * * n * * * PULSE 16-bit 32-bit SV EH3 ES EX SS EH3 ES EX SS SA SX SC EH SV EH3 SV2 ES EX SS SA S X SC EH SA SX SC EH SV SV2 SV2 0 MXNR D0 D 10 D20 K3 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1