9 Application Instructions API 150-199 Operands: S : Matrix source device D : Operation result n : Array length Explanations: 1. Range of n : K1 ~ K256 3. SA/SX/SC can designate n = 4. EH/EH2/SV/EH3/SV2 can designate n ≦ 4 . 2. S designates KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. 4. See the specifications of each model for their range of use. 5. Flags: M1095, M1097. See remarks for more details. 6. This instruction performs left-right rotation on the matrix bits in S according to array length n . M1097 determines the left (M1097 = 0) or right (M1097 = 1) rotation of matrix bits. The empty bits derived from every rotation of 1 bit (when left rotation: b 0 ; when right rotation:
b 16n-1 ) is filled by rotation bits (when left rotation: b 16n-1 ; when right rotation: b 0 ). The result is stored in D . Rotation bits not only fill the empty bits but also send the status of bits to the carry flag M1095. 7. The pulse execution instruction MBRP is generally adopted. Program Example 1: When X0 = On, M1097 = Off, indicating a left matrix rotation is performed. The 16-bit registers D0 ~ D2 will perform a left matrix rotation and the result will be stored in the matrix of the 16-bit registers D20 ~ D22. The carry flag M1095 will be “1”.
X0 M1097 b15 Before Execution b0 M1095 MBR M1097=0 After left rotation M1095 1 DVP-PLC Application Manual 9-109 API Mnemonic Operands Function 189 MBR P Matrix Bit Rotation Type OP Bit Devices Word Devices Program Steps X Y M S K H KnX KnY KnM KnS T C D E F MBR, MBRP: 7 steps S * * * * * * * D * * * * * * n * * * PULSE 16-bit 32-bit EH3 ES EX SS SA EH3 ES EX SS SA SX SC EH SV EH3 SV2 ES EX SS SA SX SC EH SV SX SC EH SV SV2 SV2 0 RST MBRP D0 D20 K3 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1