User Manual of EM730/EM730E Series Inverter 72 41: process PID pause 42: process PID integral pause 43: PID parameter switching 44: PID positive/negative switching 45: stop and DC braking 46: DC braking at stop 47: immediate DC braking 48: fastest deceleration to stop 49: retention 50: external stop 51: switching of main frequency source to digital frequency setting 52: switching of main frequency source to AI1 53: Switching of main frequency source to AI2 54: retention 55: Switching of main frequency source to high-frequency pulse input 56: switching of main frequency source to communication setting 57: inverter enabling 68: Disable reversal 69: prohibit reversing 121:
External material cutoff signal 122: Wiring detection signal 123: Brake reset terminal F02.15 Positive/negative logic 1 of digital input terminal D7 D6 D5 D4 D3 D2 D1 D0 00000 〇 * * * X5 X4 X3 X2 X1 0: positive logic, valid in the closed state/invalid in the open state 1: Negative logic, invalid in the closed state/valid in the open state F02.16 Positive/negative logic 2 of digital input terminal D7 D6 D5 D4 D3 D2 D1 D0 00 〇 * * * * * * AI2 AI1 0: positive logic, valid in the closed state/invalid in the open state 1: Negative logic, invalid in the closed state/valid in the open state F02.17 Filtering times of digital input terminal 0-100, 0: no filtering; n:
sampling every n ms 2 〇 F02.18 X1 valid delay time 0.000-30.000 s 0.000 ● F02.19 X1 invalid delay time 0.000-30.000 s 0.000 ● F02.20 X2 valid delay time 0.000-30.000 s 0.000 ● F02.21 X2 invalid delay time 0.000-30.000 s 0.000 ●