intel MCS BASIC-52 — Intel MCS BASIC-52 Versions 1 & 1.1 Operating and Reference Manual PDF (EN)

int e l 1.11 8052AH SPECIAL FUNCTION REGISTERS TMOD: Timer/Counter Mode Control Register (MSB) (LSB) TIMER 1 TIMER 0 GATE Gating control When set. Timer/Counter "x" is enabled only while "INTx" pin is high and "TRx" control pin is set. When cleared Timer "x" is enabled whenever "TRx" control bit is set C/T Timer or Counter Selector Cleared for Timer operation (input from internal system clock). Set for Counter operation (input from "Tx" input pin). M1 M0 Operating Mode 0 0 MCS-48 Timer "TLx" serves as five- bit prescaler.

0 1 16 bit Timer/Counter "THx" and "TLX" are cascaded; there is no prescaler 1 0 8-bit auto-reload timer-counter "THx" holds a value which is to be reloaded into "TLx" each time it overflows. 1 1 (Timer 0) TL0 is an eight-bit timer counter-controlled by the standard Timer 0 control bits TH0 is an eight-bit timer only controlled by Timer1 control bits. 1 1 (Timer 1) Timer-counter 1 stopped. - 195 - GAT E C/T M1 M0 GAT E C/T M1 M0