PMAC/PMAC2 V1.17C Addendum Excitation Address Setup Word : The second setup line in a resolver conversion entry contains the address of the excitation value register in the low 16 bits (the third through sixth hex digits), used to correlate the excitation and the feedback values. The excitation register is presently at a fixed address of $FF5C in the Geo PMAC, so this line should be $00FF5C. Sine/Cosine Bias Setup Word : The third setup line in a resolver conversion entry contains bias- correction terms for the sine and cosine ADC values.
The high twelve bits (the first three hex digits) contain the bias-correction term for the sine input; the low twelve bits (the last three hex digits) contain the bias-correction term for the cosine input. Each 12-bit section should be treated as a signed 12-bit value (so if the most significant of the 12 bits is a 1, the bias value is negative). Each 12-bit bias-correction term should contain the value opposite that which the high 12 bits of the matching A/D converter report when they should ideally report zero. In action, the bias term will be added to the high 12 bits of the corresponding ADC reading before subsequent calculations are done.
For example, if the bias-correction word were set to $004FFA, the sine bias correction would be +4 LSBs of a 12-bit ADC, and the cosine bias correction would be -6 LSBs ($FFA = -6) of a 12- bit ADC. In use, 4 12-bit LSBs would be added to the sine reading, and 6 12-bit LSBs would be subtracted from the cosine reading each cycle before further processing. In most cases, the bias-correction word will be determined automatically by an analog “diagnostic” entry in the conversion table. The result of that diagnostic entry, containing both bias corrections, can simply be copied into this setup word.
The resolver conversion can only be used if the Geo PMAC’s Feedback Option 1 for analog position feedback is ordered. Result Word : The output value of the resolver conversion is placed in the 24-bit X-register of the third line of the conversion table entry. The values in bits 5 – 16 of the result word contain the high 12 bits of the calculated arctangent of the bias-corrected sine and cosine values from the resolver. Because PMAC software considers the value in bit 5 to be a “count” for its scaling purposes, this conversion returns resolver position values of a 12-bit conversion (4096 “counts” per cycle of the resolver).
However, because the conversion uses dual 14-bit converters and the arctangent calculations compute more than 12 bits, the result contains additional resolution in bits 0 – 4 that PMAC software considers to have “fractional”, but still real, count resolution. If the electromagnetic noise levels are low, and the signals use near the full scale of the ADCs, a repeatable 14-bit resolution (16,384 states per cycle of the resolver) can be achieved. 22 V1.17C Firmware Version First Setup Line Conversion $E0FF00 Channel 1 CW $E8FF00 Channel 1 CCW $E0FF20 Channel 2 CW $E8FF20 Channel 2 CCW