Chapter 1: Introduction 1-2 Chipset Overview Intel’s 845 chipset is made up of three main components: *82845 Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus, *82801 BA I/O Controller Hub (ICH2) with AHA bus, *82802 AB Firmware Hub (FWH). Memory Controller Hub (MCH) The MCH includes the host (CPU) interface, SDRAM interface, ICH2 inter- face and 4xAGP interface for the 845 chipset. It contains advanced power management logic and supports three DIMMS of unbuffered SDRAM up to 3GB. The AGP 2.0 interface supports 4x data transfers and operates at a peak bandwidth of 1056 GB. The MCH host interface bus runs at 400 MHz.
I/O Controller Hub (ICH2) The ICH2 is the I/O Controller Hub subsystem on the P4SBA+/P4SBA/P4SBM, which integrates many of the Input/Output functions of the 845 chipset, including a two-channel ATA-33/66/100 Bus Master IDE controller. It also provides the interface to the PCI Bus and communicates with the MCH over a dedicated hub interface bus -- the AHA. The P4SBA+/P4SBA has the more powerful ICH2, which includes a dual channel IDE controller plus two USB controllers that offer 24 Mbps of bandwidth across four ports. ICH2 also features an enhanced AC97 interface that supports full surround sound for the Dolby Digital Audio used on DVDs (P4SBA+ and P4SBM only).
Firmware Hub (FWH) The FWH is a component that brings added security and manageability to the PC platform infrastructure. This device includes an integrated Random Number Generator (RNG) for stronger encryption, digital signing and secu- rity protocols. The FWH stores the system BIOS and video BIOS to eliminate a redundant nonvolatile memory component. 1-13