User Manual of EM760 High-Performance Inverter The response delay (t wait2 ) is defined as the time interval from the reception of the valid data frame 1 by the inverter to data parsing and return. To ensure the stable operation of the protocol chip, the response delay should be set within 1-20ms (it must not be set to 0). If the communication data involves EEPROM operation, the actual response delay time will be extended, i.e. “EEPROM operation time + F10.04”. 1: valid dataframe: sent by the external master station to inverter, in which thefunction code, data length and CRC are correct.
The figure shows the data sending segment (t send ), sending end segment (t wait1 ), 75176-to-sending wait segment (t wait2 ), data return segment (t return ), and 75176-to-receiving wait segment (t wait3 ). Fig. 6-38 Timing Parse Diagram of Complete Data Frame The EM760 series inverter supports the master-slave communication function. That is, one inverter works as the host and others as slaves. The slaves work according to the command sent by the host, so that these inverters can work synchronously. ● The inverter used as the host is set as follows:
166 Function code Function codename Parameter description Unit Default setting Attribute F10.05 Options of master-slave communication function 0: Invalid 1: valid 0 O F10.06 Master-slave options 0: slave 1: host (Modbus protocol broadcast transmission) 0 O F10.07 Data sent by host 0: output frequency 1: set frequency 2: output torque 3: set torque 4: PID setting 5: output current 1 O F10.08 Proportional factor of slave reception 0.00-10.00 (multiple) 1.00 ● F10.09 Host sending interval 0.000~30.000 s 0.200 ●