Delta — New Functions of DVP24SV2

API 158 Operands: S 1 : Number of output pulses (relative designation) S 2 : Pulse output frequency D 1 : Pulse output device (please use transistor output module) D 2 : Output device for the signal of rotation direction Explanations: 1. S 1 is the number of output pulses (relative designation). For EH/EH2/SV/EH3/SV2 series MPU, the 16-bit instruction can designate the range -32,768 ~ +32,767. The range designated by 32-bit instruction is -2,147,483,648 ~ +2,147,483,647. For SC series MPU, the 32-bit instruction can designate the range -2,147,483,648 ~ +2,147,483,647. “+/-” signs indicate forward/backward directions. 2. S 2 is the designated pulse output frequency.

For EH/EH2/SV/EH3/SV2 series MPU, the 16-bit instruction can designate its range 10 ~ 32,767Hz. The range designated by 32-bit instruction is 10 ~ 200,000Hz. For 24SV2 series MPU, the 16-bit instruction can designate the range 10 ~ 10,000Hz. The range designated by 32-bit instruction is 10 ~ 10,000Hz. For SC series MPU, the 32-bit instruction can designate the range 100 ~ 100,000Hz. 3. EH2/SV/EH3/SV2 series MPU has four groups of A/B phase pulse output, CH0 (Y0, Y1), CH1 (Y2, Y3), CH2 4. In a 24SV2 series MPU, CH4 is Pulse(Y10)+Direction (Y11), and CH5 is Pulse (Y12)+Direction (Y13). (Y4, Y5) and CH3 (Y6, Y7). See remarks for the setup methods. 5.

Pulse output device D 1 in different models Note: Only 24SV2 supports Y10 and Y12. 6. The operation of D 2 corresponds to the “+” or “-“ of S 1 . When S 1 is “+”, D 2 will be On; when S 1 is “-“, D 2 will be Off. D 2 will not be Off immediately after the pulse output is over; it will be Off only when the drive contact of the instruction turns Off. If D 1 and D 2 in a 24SV2 series MPU are Y devices, Y10/Y11 and Y12/Y13 must be used. 7. For EH/EH2/SV/EH3/SV2 series MPU, S 1 is - The 32-bit data stored in the present value registers D1337 (high word) and D1336 (low word) of CH0 (Y0, Y1).

- The 32-bit data stored in the present value registers D1339 (high word) and D1338 (low word) of CH1 (Y2, Y3). Mnemonic Operands Function D DRVI Drive to Increment Type OP Bit Devices Word Devices Program Steps X Y M S K H KnX KnY KnM KnS T C D E F DRVI: 9 steps DDRVI: 17 steps S 1 * * * * * * * * * * * S 2 * * * * * * * * * * * D 1 * D 2 * * * PULSE 16-bit 32-bit ES EX SS S A SX SC EH SV EH3 SV2 ES EX SS SA SX SC EH3 ES EX SS SA SX EH3 EH SV SC EH SV SV2 SV2 Model SC MPU EH MPU EH2/SV/EH3/SV2 MPU (Note) Pulse output end Y10, Y11 Y0, Y2 Y0, Y2, Y4, Y6, Y10, Y12