Chapter 6 Applied Instruction API 1806 Symbol: S ： Initial device to which the LRC is applied Word n ： Number of bytes Word D ： Initial device in which the operation result is stored Word Explanation: 1. Please refer to the additional remark on the instruction LRC for more information about the LRC check code. 2. The operand n should be an even number, and should be within the range between 1 and 1000. If n is not within the range, the operation error occurs, the instruction is not executed, SM0 and SM1 are ON, and the error code in SR0 is 16#200B. 3. The 16-bit conversion mode:
When SM606 is OFF, the hexadecimal data in the device specified by S is divided into the high 8-bit data and the low 8-bit data. The LRC is applied to every byte, and the operation result is stored in the high 8-bit and the low 8-bit in the device specified by D . The number of bytes depends on n . 4. The 8-bit conversion mode: When SM606 is ON, the hexadecimal data in the device specified by S is divided into the high 8-bit data (invalid data) and the low 8-bit data. The LRC is applied to every byte, and the operation result is stored in the low 8-bit in the two registers. The number of bytes depends on n . (The values of the high 8 bits in the two registers are 0.) Example: 1.
The PLC is connected to the VFD-S series AC motor drive (ASCII mode: SM210 is OFF; 8-bit mode: SM606 is ON.). The PLC sends the command, and reads the data in the six devices at the addresses starting from 16#2101 in the VFD-S series AC motor drive. PLC VFD-S The PLC sends “ ： 01 03 2101 0006 D4 CR LF”. 6-411 Instruction code Operand Function LRC S, n, D Longitudinal parity check Device X Y M S T C HC D L SM SR E PR K 16# “$” DF S n D Pulse instruction 16-bit instruction (7 steps) 32-bit instruction - AH500 -