AH500 Programming Manual 2-68 CPU5×0-RS2 CPU5×0-EN CPU5×1-RS2 CPU5×1-EN Attribute Default OFF STOP RUN SR Function ON RUN STOP SR416 in SR415. ○ ○ ○ ○ 0 – – R 0 *SR453 If an error occurs during the operation of the memory card, the error code will be recorded. ○ ○ ○ ○ – – – R 0 SR621 Interrupt character used in the instruction RS (COM1) ○ ○ ○ ○ – – – R/W 0 SR622 Interrupt character used in the instruction RS (COM2) ○ × ○ × – – – R/W 0 SR623 Bit 0~bit 15: The conditions of the interrupt programs I0~I15 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR624 Bit 0~bit 15: The conditions of the interrupt programs I16~I31 are set by the instruction IMASK.
○ ○ ○ ○ FFFF – – R FFFF SR625 Bit 0~bit 15: The conditions of the interrupt programs I32~I47 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR626 Bit 0~bit 15: The conditions of the interrupt programs I48~I63 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR627 Bit 0~bit 15: The conditions of the interrupt programs I64~I79 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR628 Bit 0~bit 15: The conditions of the interrupt programs I80~I95 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR629 Bit 0~bit 15: The conditions of the interrupt programs I96~I111 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR630 Bit 0~bit 15:
The conditions of the interrupt programs I112~I127 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR631 Bit 0~bit 15: The conditions of the interrupt programs I128~I143 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR632 Bit 0~bit 15: The conditions of the interrupt programs I144~I159 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR633 Bit 0~bit 15: The conditions of the interrupt programs I160~I175 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR634 Bit 0~bit 15: The conditions of the interrupt programs I176~I191 are set by the instruction IMASK. ○ ○ ○ ○ FFFF – – R FFFF SR635 Bit 0~bit 15:
The conditions of the interrupt programs I192~I207 are set ○ ○ ○ ○ FFFF – – R FFFF