INTRODUCTION This chapter describes the architecture of the 486 Computer System through a discussion of the bus structure and memory arbitration unit. BUS STRUCTURE The CPU is made up of various physical data and address buses that determine the general architecture of the system. Refer to Figure 3-1. The major buses are the XLA Bus, MP (Mapped Address) Bus, AD (Address) Bus, BD (Buffered Data) Bus, ZD~-7 Bus, LA (Logical Address) Bus, MD Bus,and Z8~ Address Bus. The AD bus is a multiplexed 16-bit address/data bus from the 8~186 microprocessor and is the main bus of the system. The AD bus "spawns" all the other buses in the system. 3-1