ILLUSTRATIONS PAGE SUBJECT 5-2 Figure 5-1 CPU Board Block Diagram 5-8 Figure 5-2 Master/Slave PIC Configuration 5-9 Figure 5-3 Interrupt Request 5-37 Figure 5-4 Hard Disk Controller Board Circuitry 5-4~ Figure 5-5 Sector Format TABLES 5-5 5-5 5-6 5-8 Table 5-1 Table 5-2 Table 5-3 Table 5-4 Table 5-5 Table 5-6 Table 5-7 Chip Select Register Offsets DMA Register Offsets Timer Control Register Offsets Interrupt Controller Register Offsets System Maskable Interrupts Master PIC Register Offsets 5-1~ 5-11 5-12 8~186 Microprocessor Predefined Types and Default Priority System Memory Map Memory Management Relocation Register Violation Port Bits Control Por t Regi ster Off se ts Control Bits PIA Port Address Offsets Floppy Disk Control Register Offsets Floppy Disk Controller Register Offsets 5-13 5-14 5-22 5-23 5-23 5-24 5-25 5-25 5-25 5-26 5-26 5-26 5-28 Table 5-8 Table 5-9 Table 5-1~ Table 5-11 Table 5-12 Table 5-13 Table 5-14 Table 5-15 Table 5-16 Table 5-17 Table 5-18 Table 5-19 Table 5-2~ Table 5-21 Z8~ Port Assignments SIOA Regi ster Off se ts SlOB Register Offsets Z-8~A Memory Addressing Internal Hard Disk Connectors Disk Data Format 5-4~