Interrupt Request Register (IRR) and In-Service Register (ISR) The interrupts at the IR input lines are handled by two registers in cascade, the interrupt Request Register (IRR) and the in- Service Register (ISR). The IRR is used to store all the interrupt levels which are requesting service, and the ISR is used to store all the interrupt levels which are being serviced. Figure 5-2.
Master/Slave PIC Configuration Table 5-4 Interrupt Controller Register Offsets ADDRESS (HEX) FUNCTION FF22H FF24H FF26H FF28H FF2AH FF2CH FF2EH FF30H FF32H FF34H FF36H FF38H FF3AH FF3CH FF3EH EOI POLL POLL STATUS MASK PRIORITY MASK IN-SERVICE INTERRUPT REQUEST INTERRUPT CONTROLLER STATUS TIMER CONTROL DMA 0 CONTROL DMA I CONTROL INTO CONTROL INTI CONTROL INT2 CONTROL INT3 CONTROL 5-8 - 8259A MASTER .. INTA IRO 80186 INT. IN INT • .. - IR7 80186 CAS2 - ~ - INT 0 - ~ iNf1 - SLAVE SELECT DECODER PAL - INT 2 80186 SLAVE INTERRUPT OUTPUT INT 3 80186 INT 0 iNf1 INT 2 INT 3