Protection Bits Four bits from the mapper contain the protection code that are sent via the BD Bus to the MMU. These bits are called ALLOWSYWR, ALLOWUSRWR, ALLOWUSRACC and BOSPACE. The first three bits allow system write access, user write access, or user read access to the given 4K page. The last bit is used for a stack warning indicator. If an access takes place within 128 bytes above the bottom of a page so marked then a stack warning is given to the CPU. The "allow" bits are set by the operating system. When the system is in user mode, the user may be allowed read and write access or neither depending on the accessed page.
When the system is in supervisor mode, write access may be denied on some pages. Violation Detection The bits in the violation port are defined in Table 5-10. All of these violations are latched and can be read via the Violation Port address offset 2F0 through 2FE. When these violations are detected, they cause an NMI to the processor. After a violation has occurred, further violations will not pro- duce non-maskable interrupts until the current violation has been cleared. Violations can be cleared by performing an I/O instruction to the control port register 296H. Normally, only one violation bit will be set in the violation port if an error occurs.
However, if another violation occurs before the first violation has been cleared, then the new vio- lation will be detected and latched so that more than one vio- lation bit could be set. No information is given about which violation occurred first. In addition, only the address of the first violation is latched. Table 5-10 Violation Port Bits I BIT NAME user Access Violation (read/write/op code fetch) User Write Violation System Write Violation parity Error End of Stack Warning Not Used 1 2 3 4 5-15 5-22