Altos Computer Systems Altos 486 — Altos 486 System Reference Manual – Service & Technical Guide PDF (EN)

Channel Command Register (continued) 8 9 10 11 12-15 change parameters reset error conditions reset modem interrupt request execute from XLA bus (Port 3 only) not used bit 7 bit 6 bit 5 bit 4 command valid transmit interrupt enable receive interrupt enable modem interrupt enable Transmit Data Buffer Address Register The transmit data buffer address register is a 24-bit register containing the address of the data to be transmitted. After tansmit termination, this register will contain the address of the last character transmitted + 1. Transmit Data Buffer Length Register The transmit data buffer length register is a 16-bit register containing the number of bytes to be transmitted.

After an transmit termination, this register will contain the number of characters in the buffer NOT transmitted. (Note: this value will be 0 unless the transmission was aborted.) Receive Data Buffer Address Register The receive data buffer address register is a 24-bit register containing the address of the receive buffer when receiving in ring buffer receive mode. Receive Data Buffer Length Register The receive data buffer length register is a 16-bit register containing the length of the receive data buffer. The receive buffer length may be in the range of 2-32768 bytes.

Receive Buffer Input Pointer Register The receive buffer input pointer register is a l6-bit register containing a pointer (relative to the receive data buffer address) to the first empty location in the receive buffer. As characters are received, the controller will store the character at the specified location, and increment this pointer module buffer length. Bit 15 is the "counter invalid" bit. When this bit 5-34