int e l 9.7 INTERRUPTS Interrupts can be handled by MCS BASIC-52 in two distinct ways. The first, which has already been discussed, allows statements in an MCS BASIC-52 program to perform the required interrupt routine. The ONTIME and ONEX1 statements enable this particular interrupt mode. Additionally, setting BIT 26.1H permits EXTERNAL INTERRUPT 0 to act as a "fake" DMA input and the details of this feature are in the BELLS, WHISTLES, and ANOMALIES section of this manual. The second method of handling interrupts in MCS BASIC-52 allows the programmer to write assembly language routines to perform the interrupt task.
This method yields a much faster interrupt response time, but, the programmer must exercise some caution. All interrupt vectors on the MCS BASIC-52 device are "mirrored" to external PROGRAM MEMORY LOCATIONS 4003H through 402BH inclusive. The only MCS BASIC-52 STATEMENTS that enable the interrupts on the 8052AH are the CLOCK1 and the ONEX1 STATEMENTS. If interrupts are NOT enabled by these STATEMENTS, BASIC assumes that the USER is providing the interrupt routine in assembly language. The vectors for the various interrupts are as follows:
LOCATION---INTERRUPT 4003H------EXTERNAL INTERRUPT 0 400BH------TIMER 0 OVERFLOW 4013H------EXTERNAL INTERRUPT 1 401BH------TIMER 1 OVERFLOW 4023H------SERIAL PORT 402BH------TIMER 2 OVERFLOW/EXTERNAL INTERRUPT 2 The programmer can enable interrupts in MCS BASIC-52 by using the statement IE = IE.OR.XXH, where XX enables the appropriate interrupts. The bits in the interrupt register (IE) on the 8052AH are defined as follows: - 129 - BIT 7 6 5 4 3 2 1 0 EA X ET2 ES ET1 EX1 ET0 EX0 ENABLE UNDE- TIMER 2 SERIAL TIMER 1 EXT 1 TIMER 0 EXT 0 ALL FINED PORT