int e l 9.7 INTERRUPTS Interrupts are enabled when the appropriate BITS in the IE register are set to a one. Details of the 8052AH interrupt structure are available in the MICROCONTROLLER USERS MANUAL available from INTEL. IMPORTANT NOTE!! Before MCS BASIC-52 vectors to the USER interrupt locations just described, the PROCESSOR STATUS WORD (PSW) is PUSHED onto the STACK. So, the USER does not have to save the PSW in the assembly language interrupt routine!!! HOWEVER, THE USER MUST POP THE PSW BEFORE RETURNING FROM THE INTERRUPT. VERY IMPORTANT NOTE!!!
If the user is running some interrupt driven "background" routine while MCS BASIC-52 is running a program, the user MUST NOT CALL any of the assembly language routines available in the MCS BASIC-52 device. The only way the routines in the MCS BASIC-52 device can be accessed is when the CALL statement in MCS BASIC-52 is used to transfer control to the users assembly language program. The reason for this is that the MCS BASIC-52 interpreter must be in a "known" state before the user can call the routines available in the MCS BASIC-52 device and a "random" interrupt does not guarantee that the interpreter is in this known state.
The user should use REGISTER BANK 3 to handle interrupt routines in assembly language. - 130 -