Chapter 7 High-speed Counter Module AH02HC/AH04HC (1) Linear accumulation: If an accumulation register counts up, it counts from 0 to 999999999. If an accumulation register counts down, it counts from 0 to -999999999. If the value in an accumulation register is larger than the maximum value 999999999 or less than the minimum value -999999999, the value in the accumulation register will be 999999999 or -999999999, and bit 1 in CR19/CR47/CR75/CR103 will be turned ON. Users can read the error code 16#A0n1 in CR26/CR54/CR82/CR110. (n is a channel number. n: 0~3 (i.e.
channel 0~channel 3)) N umber of accumulat ed pulses * - 999999999 999999999 o r 0 Operation of a counter bit0 (param eters for operation) The linear accumulation is equal to the maximum value or the minimum value. bit2 (parameters for operat ion state) ON The resetting value of the linear accumulation, of the accumulation register, pulse input register, or the linear accumulation is equal to the maximum value or the minimum value.
bit 2 (parameters for operation) If the linear accumulation is larger than the maximum value 999999999 or less than the minimum value -999999999 in the count cycle, the value stored in the accumulation register will be 999999999 or -999999999, bit 1 in CR19/CR47/CR75/CR103 will be turned ON. Users can read the error code 16#A0n1 in CR26/CR54/CR82/CR110. (n is a channel number. n: 0~3 (i.e. channel 0~channel 3)) If bit 1 in CR0/CR28/CR56/CR84 is turned ON, the sampling register/accumulation register/pulse input register, and bit 1 in CR19/CR47/CR75/CR103 will be reset.
After the sampling register/accumulation register/pulse input register, and bit 1 in CR19/CR47/CR75/CR103 is reset, bit 1 in CR0/CR28/CR56/CR84 will be turned OFF automatically. The related parameters are described below. * : Th e cycle of u pdatin g th e n umb er of s ampl ed pu lses i s the cycle set. 7-25 Tim e ON OFF ON OFF ON OFF Item Value/Setting value Parameter CH0 CH1 CH2 CH3 Number of accumulated pulses (Low word) -999999999~999999999 #22 #50 #78 #106 Number of accumulated pulses (High word) #23 #51 #79 #107 Operating state of a counter Bit 1: The linear accumulation is larger than the maximum value or less than the minimum value. #19 #47 #75 #103 Operation of a counter Bit 1:
Resetting the sampling register/accumulation register/pulse input register, and bit 1 in CR19/CR47/CR75/CR103 #0 #28 #56 #84