Altos Computer Systems Altos 486 — Altos 486 System Reference Manual – Service & Technical Guide PDF (EN)

Power-up Test Upon power-up, or system reset, the Monitor performs a sequence of diagnostic tests (up to eighteen) to verify the system's overall integrity.

Table 6-7 Power-up Test structure Power-up Test Number (dec) Component Tested o 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Monitor Prom (Low byte) Monitor Prom (High byte) Map Ram Data Lines Map Ram Address Lines Map Ram Contents Main Ram Data Lines Main Ram Address Lines Parallel (B255) Port ZB0 Interface test ZB0 Channel test Main Ram Contents Interrupt (B259) Controller Internal CPU Timer Internal CPU PIC Internal CPU DMA Diag Console (B274) Controller Floppy (765) Controller Memory Parity Functional verification begins with Test Number 0 and progresses on to Test Number 17 using the following algorithms: A) The seventeen power-up tests can be divided into group 1 and group 2.

Group 1 includes Test Number 0 through Test Number 7. These tests are more critical to the system integrity than those in group 2 (B-17). B) As soon as a test in group 1 (0 - 7) fails, the Monitor skips over the remaining tests, continues the normal boot attempt, and reports the error status. (note: since this failure is considered catastrophic, further tests have no significant meaning). C) Tests in group 2 (8 - 17) are executed regardless of any previous test status. Power-up test failure reporting is described in the next section. 6-18