Subsystem Functions 5 PAGE SUBJECT 5-1 INTRODUCTION 5-1 CENTRAL PROCESSING UNIT (CPU) HARDWARE OVERVIEW 5-3 8~186 MICROPROCESSOR ARCHITECTURE 5-3 Addressing Modes 5-4 Direct Memory Access (DMA) Operation 5-6 Programmable Timer Operation 5-7 Interrupt Control Operation 5-12 MEMORY ADDRESSING 5-13 MEMORY MANAGEMENT UNIT 5-23 SYSTEM CONTROL PORT 5-24 FLOPPY DISK CONTROLLER OPERATION 5-24 Programming 5-25 Z-8~A I/O CONTROLLER 5-25 Functional Description 5-26 Z-8~A I/O Processor Memory 5-27 8~186/Z-8~A Communnications 5-28 Host/Controller Communication 5-28 Controller Initialization 5-29 Channel Initialization 5-29 Channel Transmit Operation 5-29 Channel TTY Receive Operation 5-29 Channel Ring Buffered Receive Operation 5-3~ Modern Status Operation 5-3~ Initialization Register 5-31 Control Registers 5-32 Communication Channel Registers 5-36 HARD DISK CONTROLLER HARDWARE OVERVIEW 5-36 INTRODUCTION 5-36 FUNCTIONAL DESCRIPTION 5-36 Disk Drive Description 5-36 Head Selection 5-39 Formatting Guidelines 5-3~ REGISTER DEFINITIONS