is set, the contents of the counter is in the process of being updated. This bit may be ignored if the buffer is = 255 bytes in length. Receive Buffer Output Pointer Register The receive buffer output pointer register is a l6-bit register containing a pointer (relative to the receive data buffer address) to the first full location in the receive buffer. As characters are removed from the buffer, the host will increment this pointer modulo buffer length. When the input pointer is equal to the output pointer, the buffer is empty. Bit 15 is the "counter invalid" bit. When this bit is set, the contents of the counter is in the process of being updated.
This bit may be ignored if the buffer is = 255 bytes in length. TTY Receive Register The TTY receive register is an 8-bit register used to receive data in applications not requiring multiple-byte ring-buffering. In TTY receive mode, the byte is simply stored in the TTY receive register. Selectable Rate Register The selectable rate register is a l6-bit register used to trans- fer a l6-bit value directly to the bit rate generator. When the rate is specified through this register, the SIO controller is programmed for clock/16 mode. The value to store in this location can be calculated by the formula:
768~~/desired bit rate Expansion Register Because some computers/programming languages cannot (or cannot easily) generate/support multiple occurrence arrays containing an odd number of bytes, an 8-bit register is included at the end of each channel register array. This register completes the array of an even number of bytes which mayor may not be located on a word boundry. The register is reserved for the purpose of future expansion. 5-35