7 Application Instructions API 50-99 API 53 Operands: S 1 : Comparative value S 2 : No. of high speed counter D : Comparison result Explanations: 1. S 2 has to designate the No. of high speed counters C235 ~ C255. See remarks for more details. 2. D can designate I0 □ 0; □ = 1 ~ 6. ES series MPU does not support this. 3. D of ES and SA series MPU does not support E, F index register modification. 4. See the specifications of each model for their range of use. 5. Flags: M1289 ~ M1294 are interruption disability of the high speed counters in EH/EH2/SV/EH3/SV2 series MPU. See Program Example 3 for more details. 6.
The high speed counter inputs counting pulses from the corresponding external input terminals X0 ~ X17 by inserting an interruption. When the high speed counter designated in S 2 pluses 1 or minuses 1, DHSCS instruction will perform a comparison immediately. When the present value in the high speed counter equals the comparative value designated in S 1 , device designated in D will turn On. Even the afterward comparison results are unequal, the device will still be On. 7.
If the devices specified as the device D are Y0 ~ Y17, when the compare value and the present value of the high-speed counter are equal, the comparison result will immediately output to the external inputs Y0 ~ Y17, and other Y devices will be affected by the scan cycle. However, M, S devices are immediate output and will not be affected by the scan cycle. Program Example 1: After PLC RUN and M0 = On, DHSCS instruction will be executed. When the present value in C235 changes from 99 to 100 or 101 to 100, Y10 will be On constantly. M1000 M0 On immediately Program Example 2: Differences between Y output of DHSCS instruction and general Y output:
a) When the present value in C249 changes from 99 to 100 or 101 to 100, Y10 outputs immediately to the external output point by interruption and has nothing to do with the PLC scan time. However, the time will still be delayed by the relay (10ms) or transistor (10us) of the output module. DVP-PLC APPLICATION MANUAL 7-5 Mnemonic Operands Function D HSCS High Speed Counter Set Type OP Bit Devices Word Devices Program Steps X Y M S K H KnX KnY KnM KnS T C D E F DHSCS: 13 steps S 1 * * * * * * * * * * S 2 * D * * * PULSE 16-bit 32-bit SA SX SC EH SV EH3 SV2 ES EX SS SA SX SC EH SV EH3 SV2 EH3 ES EX SS ES EX SS SA SX SC EH SV SV2 DCNT C235 K1000 DHSCS K100 C235 Y10