int e l 10.1 MEMORY / HARDWARE CONFIGURATION RAM / EPROM MODE The RAM/EPROM mode of operation allows for the complete system implementation of MCS BASIC- 52. This mode of operation requires that external memory be mapped in a certain manner. The RAM/EPROM memory configuration is as follows: 1) The /RD and the &WR pins on the MCS BASlC-52 device are used to enable RAM memory that is addressed from 0000H to 7FFFH. Addresses are used to decode the chip select (/CS) for the RAM devices and /RD and /WR are used to enable the /OE and /WE or (/WR) pins respectively. 2) The /PSEN pin on the MCS BASIC-52 device is used to enable EPROM memory that is addressed from 2000H to 7FFFH.
Addresses are used to decode the chip select (/CS) for the EPROM devices and /PSEN is used to enable the /OE pin. 3) For addresses between 8000H and 0FFFFH both the /RD and the /PSEN pin on the MCS BASIC-52 device are used to enable the memory. Either EPROM or RAM devices can be placed in this address space. To permit both the /RD and the /PSEN pins to enable addresses in this address space, /RD and /PSEN must be logically "ANDED" together. This can be accomplished with a simple TTL gate such as a 74LS08. The /WR pin on the MCS BASIC-52 device is used to write to RAM memory in this same address space.
The /PSEN and /RD signals do not have to be anded beyond address 7FFFH to enable MCS BASIC-52 to program an EPROM. This is only a suggestion since it will permit the user to execute assembly language routines as well as MCS BASIC-52 programs that are located in this address space. - 133 -