int e l MAPPING USER CODE MEMORY Other vectors between 2040H and 2090H also exist, but they are mainly for testing purposes, but for your information they are: LOCATION FUNCTION 2040 H TRAP LOCATION FOR EXTERNAL INTERRUPT 0 IF BIT 26H OF INTERNAL RAM IS SET AND THE DMA OPTION IS EVOKED. PSW IS NOT PUSHED ONTO STACK. INTERRUPTS OF COURSE, MUST BE ENABLED. ALSO, THIS LOCATION WILL BE CALLED FOR CONSOLE OUTPUT IF BIT 2CH OF INTERNAL RAM IS SET. 2050 H TRAP LOCATION FOR SERIAL PORT INTERRUPT IF BIT 1FH OF INTERNAL RAM IS SET. PSW IS PUSHED ONTO THE STACK. 2060 H CALLED FOR CONSOLE INPUT IF BIT 32H OF INTERNAL RAM IS SET. 2068 H CALLED FOR CONSOLE STATUS CHECK IF BIT 32H OF INTERNAL RAM IS SET.
2088 H TIMER1 INTERRUPT TRAP IF BIT 1AH OF INTERNAL RAM IS SET. PSW IS PUSHED ONTO THE STACK. Contrary to popular belief, these vectors were not chosen to force the user to buy bigger EPROMS. They are chosen so that addresses 2000H and 4000H can be overlayed and create no conflicts. The Overlayed addresses would appear as 2001H, 2002H, 4003H, 400BH, 4013H, 401BH, 4023H, 402BH, 4030H, 4033H, 4036H, 4039H, 2040H, 2048H, 2050H, 2060H, 2068H, 2070H, 2078H, 2088H, 2090H, and 4100H thru 41FFH. The diagram on the next page illustrates how to implement overlapping addresses for 2000H and 4000H.
By using overlapping addresses, the user can implement all MCS BASIC-52 user expansion options with only a few hundred bytes of EPROM. The reason this type of addressing scheme was chosen is that it permits the designer to offer custom versions of MCS BASIC-52, by using the vector locations in the 2000H region. And give the designers OEM the ability to take advantage of the I/O vectors located in the 4000H region. As an added note, the MCS-51 instruction set is object relocatable on 2K boundaries if no LCALL or LJMP instructions are used. This means that it is possible for the designer to ORG a program for 2000H and actually execute the program at 2800H, 3000H, 3800H, etc.
If the user does not use the LCALL or LJMP instructions. - 160 -