intel MCS BASIC-52 — Intel MCS BASIC-52 Versions 1 & 1.1 Operating and Reference Manual PDF

int e l 1.1 MEMORY USAGE (VERSION 1.1) The following list specifies what locations in internal and external memory locations are used by Version 1.1 of MCS BASIC-52. Any differences between V1.0 and V1.1 are in bold face type. INTERNAL MEMORY ALLOCATION:

(VERSION 1.1) LOCATION(S) IN HEX MCS BASIC-52 USAGE 00H THRU 07H "WORKING REGISTER BANK" 08H BASIC TEXT POINTER -- LOW BYTE 09H ARGUMENT STACK POINTER 0AH BASIC TEXT POINTER -- HIGH BYTE 0BH THRU 0FH TEMPORARY BASIC STORAGE (Available to user in BASIC CALLS to ASM routines) 10H READ TEXT POINTER -- LOW BYTE 11H CONTROL STACK POINTER 12H READ TEXT POINTER -- HIGH BYTE 13H START ADDRESS OF BASIC PROGRAM -- HIGH BYTE 14H START ADDRESS OF BASIC PROGRAM -- LOW BYTE 15H NULL COUNT 16H PRINT HEAD POSITION FOR OUTPUT 17H FLOATING POINT OUTPUT FORMAT TYPE 18H THRU 21H NOT USED -- RESERVED FOR USER 22H BITS USED SPECIFICALLY AS FOLLOWS BIT 22.0H SET WHEN "ONTIME" STATEMENT IS EXECUTED BIT 22.1H SET WHEN BASIC INTERRUPT IN PROGRESS BIT 22.2H SET WHEN "ONEX1" STATEMENT IS EXECUTED BIT 22.3H SET WHEN "ONERR" STATEMENT IS EXECUTED BIT 22.4H SET WHEN "ONTIME" INTERRUPT IS IN PROGRESS BIT 22.5H SET WHEN A LINE IS EDITED BIT 22.6H SET WHEN EXTERNAL INTERRUPT IS PENDING BIT 22.7H WHEN SET, CONT COMMAND WILL WORK 23H BITS USED SPECIFICALLY AS FOLLOWS BIT 23.0H USED AS FLAG FOR "GET" OPERATOR BIT 23.1H SET WHEN PRINT@ OR LIST@ IS EVOKED BIT 23.2H RESERVED, TRAPS TIMER 1 INTERRUPT BIT 23.3H CONSOLE OUTPUT CONTROL, 1 = LINE PRINTER BIT 23.4H CONSOLE OUTPUT CONTROL, 1 = USER DEFINED BIT 23.5H BASIC ARRAY INITIALIZATION BIT BIT 23.6H CONSOLE INPUT CONTROL, 1 = USER DEFINED BIT 23.7H RESERVED, USED TO TRAP SERIAL PORT INTERRUPT - 166 -