int e l Table B-1. Instruction Set Summary (Cont'd.) - 202 - Mnemonic Operation Cycles Binary Code Flags P OV AC C Function CJNE @Rr,#data,code addr (PC) data THEN (PC) 2 1 0 1 1 0 1 1 r d d d d d d d d o o o o o o o o C If immediate data and contents of indirect address are not equal, jump to code address. CJNE A,#data,code addr (PC) data THEN (PC) 2 1 0 1 1 0 1 0 0 d d d d d d d d o o o o o o o o C If immediate data and A are not equal, jump to code address. CJNE A,data addr,code addr (PC) (data address) THEN (PC) 2 1 0 1 1 0 1 0 1 m m m m m m m m o o o o o o o o C If contents of data address and A are not equal, jump to code address.
CJNE Rr,#data,code addr (PC) data THEN (PC) 2 1 0 1 1 1 r r r d d d d d d d d o o o o o o o o C If immediate data and register are not equal, jump to code address. CLR A (A) 1 1 1 1 0 0 1 0 0 P Set A to zero (0). CLR C (C) 1 1 1 0 0 0 0 1 1 C Set C to zero (0). CLR bit addr (bit address) 1 1 1 0 0 0 0 1 0 b b b b b b b b Set bit to zero (0). CPL A (A) 1 1 1 1 1 0 1 0 0 P Complements each bit in A. CPL C (C) 1 1 0 1 1 0 0 1 1 C Complement C. CPL bit addr (bitaddress) 1 1 0 1 1 0 0 1 0 b b b b b b b b Complement bit. DA A 1 1 1 0 1 0 1 0 0 P C Adjust A after a BCD add. DEC @Rr ((Rr)) 1 0 0 0 1 0 1 1 r Decrement contents of indirect address. DEC A (A) 1 0 0 0 1 0 1 0 0 P Decrement A.
DEC Rr (Rr) 1 0 0 0 1 1 r r r Decrement register.