intel MCS BASIC-52 — Intel MCS BASIC-52 Versions 1 & 1.1 Operating and Reference Manual PDF

int e l 4.34 DESCRIPTION OF STATEMENTS STATEMENT: IDLE (VERSION 1.1 ONLY) MODE: RUN TYPE: CONTROL The IDLE statement forces the MCS BASIC-52 device into a "wait until interrupt mode." Execution of statements is halted until either an ONTIME [expr], [ln num] or an ONEX1 [ln num] interrupt is received. The user must make sure that one or both of these interrupts have been enabled before executing the IDLE instruction or else the MCS BASIC-52 device will enter a "wait forever mode" and for all practical purposes the system will have crashed.

When an ONTIME [expr], [ln num] or an ONEX1 [ln num] is received while in the IDLE mode, the MCS BASIC-52 device will execute the interrupt routine, then execute the statement following the IDLE instruction. Hence, the execution of the IDLE instruction is terminated when an interrupt is received. While in the IDLE mode, the MCS BASIC-52 device asserts the /DMA ACKNOWLEDGE pin (PORT 1, BIT 6 = 0) to indicate that the IDLE instruction is active and that no external bus activity will occur. This PIN is physically pin 7 on the MCS BASIC-52 device. When the MCS BASIC-52 device exits from the IDLE mode, this pin is placed back into the logically 1 (non-active) state.

The user may also exit from the IDLE mode with an assembly language interrupt routine. This is accom- plished by setting BIT 33 (21H) (which is in Bit addressable RAM location 36.1) when returning from the assembly language interrupt routine. If this bit is not set by the user, the MCS BASIC-52 device will remain in the IDLE mode when the user assembly language routine returns to BASIC. An attempt to execute the IDLE statement in the direct mode will yield a BAD SYNTAX ERROR. - 69 -