36 fig.cir-main-1of3.eps CIRCUIT DIAGRAM (MAIN 1/3) Mar.2006 MC-808 H-UDI IC19A 1 7 (NIU) (NIU) D 10 SW1B ESD170202 IC9G TC74VHCT04AFT C40 0.1 CTS2 MIDI_IN RXD2 MIDI_OUT RTS2 TXD2 R355 10k 16FMN-BTK-A CN11 (NIU) RA158 10k RA157 10k D C73 15p 1 4 R54 680 R110 1k R51 1M 20 10 SW4B ESD170202 D 14 7 C41 0.1 +5 D R356 10k +5 D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 D 1 2 LED1 SML-310LT R8 NIU 1 2 3 4 5 6 7 8 9 10 RA8 10k + D 3.3 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 + D 3.3 M51953BFP-C61J C82 0.1 +5 D RESET D C74 15p 16.000MHz X2 3 5 IC19B XOUT 2 XIN/CLK 1 P2027A-08TR IC17 D 20 IC10G HD74LV04AT D 14 7 + D 3.3 D R357 10k 11 10 5 6 1 2 IC9E 11 10 R30 100 9 8 IC9C 5 6 R27 100 IC9A 1 2 R25 100 5V 3.3V D AUDCK XRST XASEBRKAK TDO D15 TDI D13 XTRST XTRST TMS TCK XAUDSYNC AUDATA3 AUDATA2 AUDATA1 AUDATA0 XCASL XRASL XCE2B XCE2A XCE1B XCE1A XCS4 XCS0 XCS3 XCS2 RD/XWR XWE3 XWE2 XWE1 XWE0 XRD IC26 D GND 4 RST VCC 7 6 R74 4.7k +5 D 3 5 7 MRA SSON SR0 MODOUT R281 10k R280 10k + D 3.3 1 2 + D 3.3 IC10E 13 12 IC10C 9 8 IC10A 3 4 IC9F 13 12 IC9D IC9B 3 4 RA26 10k AUDCK XRST XASEBRKAK TDO TDI TMS TCK XAUDSYNC AUDATA3 AUDATA2 AUDATA1 AUDATA0 C83 1 DLY 5 NC NC NC NC 1 2 3 8 1 2 IC25A TC7WU04FU IC19D 8 4 C75 0.1 + D 3.3 D 4 VSS 6 VDD 8 C65 0.1 + D 3.3 CTL1 HOLD A_MUTE D SKQMAK SW3 (NIU) R34 10k 1 3 IC10F IC10D IC10B 1 8 2 7 3 6 4 5 D + D 3.3 (NIU) 1 3 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 CARD-PW-ON/XOFF 1 8 XRD GP78 XWE0 XWE1 2 7 3 6 4 5 XWE2 RA2 33 1 8 XWE3 GP82 RD/XWR XCS2 XCS3 2 7 3 6 4 5 RA159 33 1 8 XCS0 XCS4 GP89 XCE1A 2 7 3 6 XCE1B GP90 4 5 RA7 33 1 8 GP92 XCE2B XCE2A 2 7 XRASL GP96 GP94 3 6 4 5 XCASL RA156 33 D 1 2 SKQMAK SW5 HD74LV04AT IC25C 5 6 IC25B 3 4 D IC19C 6 2 22 R47 D WX CF USB SDA DIMM (NIU) D ESD170202 2 SW4A + D 3.3 BEAT-G BEAT-R (NIU) 1 2 SW2 SKQMAK R22 10k + D 3.3 D ESD170202 2 SW1A + D 3.3 CF LCD GP79 GP81 GP80 GP83 GP87 GP88 GP85 GP91 GP98 13 12 11 10 (NIU) R76 100 C137 0.1 3.3V CPUCLK XPCMCIA-IRL XIREQ2 CD_BUS_EN CF D XRST R33 10k D R21 10k + D 3.3 RA162 10k XASEBRKAK RA161 10k TDO TDI R354 10k TCK TMS XTRST RA160 10k AUDATA0 D21 AUDATA1 AUDATA2 AUDATA3 XAUDSYNC PTE2 + D 3.3 CKE XBBIOIS16 Motor_Enable D IC25F IC25E D C81 0.1 IC25D 9 8 VC 2 IN 1 PQ070XZ01ZP + D 3.3 IC35 + D 3.3 R39 10k R38 100 R35 10k + D 3.3 NFRXB XCD_DETECT CKIO XPCMCIA-RST SCL DIMM PTE7 LCD + D .
1 9 D XDACK0 R14 10k R10 33 PTC0 IC25G HD74LV04AT D C84 0.1 + D 3.3 R77 100 R75 100 R73 100 D 5 VAD GND OUT D clockMODE1 clockMODE1 clockMODE1 WX area0=8bit area0=8bit Big endian XWXINT XDREQ0 C52 1000P CTL1 HOLD AUDCK R24 22 CPUCLK 10k R279 C16 470p C15 470p R18 33 XWAIT GP96 GP92 GP94 GP91 GP90 GP89 GP88 GP87 GP85 GP78 GP83 GP80 GP79 GP82 GP81 (NotUse) 14 7 XRST XFLRST XRST5 C135 0.1 4 3 MD5 MD4 MD3 MD2 MD1 MD0 169 168 167 164 129 163 DREQ1/PTH[6] DREQ0/PTH[5] IRQ4/PTH[4] IRQ3/IRL3/PTH[3] IRQ2/IRL2/PTH[2] IRQ1/IRL1/PTH[1] IRQ0/IRL0/PTH[0] 161 160 155 154 153 152 151 RESETP CA 165 166 RESETM NMI 149 157 AN[0]/PTJ[0] AN[1]/PTJ[1] AN[2]/DA[1]/PTJ[2] AN[3]/DA[0]/PTJ[3] 171 172 173 174 AUDCK/PTG[4] ADTRG/PTG[5] 159 162 CTS2/IRQ5/SCPT[5] 147 SCK0/SCPT[1] 141 RXD0/SCPT[0] 145 TXD0/SCPT[0] 140 SCK2/SCPT[3] RTS2/SCPT[4] 143 144 RXD2/SCPT[2] 146 TXD2/SCPT[2] 142 CKIO 138 STATUS0/PTE[4] STATUS1/PTE[5] TCLK/PTE[6] IRQOUT/PTE[7] 133 134 135 136 EXTAL 132 XTAL 131 EXTAL2 3 XTAL2 2 CAP1 124 CAP2 127 TDO/PTF[5] ASEBRKAK/PTF[6] ASEMDO 120 121 122 TDI/PTG[0] TCK/PTG[1] TMS/PTG[2] TRST/PTG[3] 114 116 118 119 AUDATA[0]/PTF[0] AUDATA[1]/PTF[1] AUDATA[2]/PTF[2] AUDATA[3]/PTF[3] AUDSYNC/PTF[4] 109 110 111 112 113 DACK0/PTE[0] DACK1/PTE[1] DRAK0/PTE[2] DRAK1/PTE[3] 105 106 107 108 BACK BREQ WAIT 102 103 104 RASL/PTD[0] 96 IOIS16/PTD[5] 100 101 CE2A/PTD[6] 92 CE2B/PTD[7] 94 CS0 85 CS2/PTC[3] 87 CS3/PTC[4] 88 CS4/PTC[5] 89 CS5/CE1A/PTC[6] 90 CS6/CE1B/PTC[7] 91 RD 78 RD/WR 83 WE0/DQMLL 79 WE1/DQMLU/WE 80 BS/PTC[0] 77 WE2/DQMUL/ICIORD/PTC[1] 81 WE3/DQMUU/ICIOWR/PTC[2] 82 IC1 HD6417706F133 XRST XRST5 C136 EEE-A@SP 100/6.3 (Grobal for 3.3V-Devices for NOR 5V-Devices for 10 R107 CF-CARD 1.9V RR0816@D + D .
1 9 VSS-RTC VCC-RTC VSS-PLL1 VSS-PLL2 VCC-PLL1 VCC-PLL2 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ MICOM SH7706 (SH-3) VCC VCC VCC VCC AVSS AVSS AVCC D31/PTB[7] D30/PTB[6] D29/PTB[5] D28/PTB[4] D27/PTB[3] D26/PTB[2] D25/PTB[1] D24/PTB[0] D23/PTA[7] D22/PTA[6] D21/PTA[5] D20/PTA[4] D19/PTA[3] D18/PTA[2] D17/PTA[1] D16/PTA[0] D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Reset) Flash R108 39 IC12C R109 470 4 1 + D . 1 9 125 126 C67 0.1 123 128 + D . 1 9 25 37 49 61 84 93 137 156 11 13 27 39 51 63 86 95 139 158 + D 3.3 VSS VSS VSS VSS VSS 19 71 115 130 148 21 73 117 150 + D .
1 9 176 170 C21 0.1 175 5 6 7 8 9 10 12 14 15 16 17 18 20 22 23 24 26 28 29 30 31 32 33 34 35 36 38 40 41 42 43 44 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 76 75 74 72 70 69 68 67 66 65 64 62 60 59 58 57 56 55 54 53 52 50 48 47 46 45 RA83 22 RA82 22 RA80 22 RA78 22 RA75 22 RA72 22 R2 R1 D C69 0.1 RTC D C68 0.1 D C48 10 C46 0.1 C44 0.01 C43 0.1 C42 0.01 C39 0.1 C38 0.01 C37 0.1 C36 0.01 C35 0.1 D C34 10 C33 0.01 C32 0.1 C31 0.01 C30 0.1 D C22 EEE-S@SR 10/16 + D 3.3 2 7 3 6 4 5 =1.9V Power =1.9V PLL D D =3.3V A/D D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D14 D15 D16 D17 D18 D19 D20 D22 D23 D24 D25 D26 BA6 D27 D28 D29 D30 D31 A0 A1 A2 A9 Area4(16bit) NotUse(MotorDrive) XWE0 XRD Area0(8bit) Power =3.3V I/O Power =1.9V Power Core Power D0 D1 D2 D3 D4 D5 D6 D7 D8 BD11 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D[31..0] IC22A HD74LV08AT 2 1 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 (CF) A24 A24 3 RA23 10k RA18 10k RA16 10k RA14 10k + D 3.3 + D 3.3 XCS4 A22 A23 D IC24 TC74VHC138FT + D 3.3 XCS0 A23 A24 A25 IC21 TC74VHC138FT Decoder Address XWE0 XWE1 CKIO CKE RD/XWR XCASL XRASL XCS3 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A15 A14 XWE2 XWE3 R15 10 CKIO CKE RD/XWR XCASL XRASL XCS3 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 BA15 A15 A14 A[25..0] 16 8 G2B G2A G1 VCC GND 5 4 6 C B A 3 2 1 + D 3.3 16 8 G2B G2A G1 VCC GND 5 4 6 C B A 3 2 1 + D 3.3 K4S641632H-UC75000 NC VSS 40 41 NC 36 LDQM 15 UDQM 39 R23 10 CKE CLK 37 38 WE 16 CAS 17 RAS 18 CS 19 A0 A1 A2 A3 23 24 25 26 A4 A5 A6 A7 A8 A9 29 30 31 32 33 34 A10/AP 22 A11 35 A13 A12 20 21 K4S641632H-UC75000 NC VSS 40 41 NC 36 LDQM 15 UDQM 39 CKE CLK 37 38 WE 16 CAS 17 RAS 18 CS 19 A0 A1 A2 A3 23 24 25 26 A4 A5 A6 A7 A8 A9 29 30 31 32 33 34 A10/AP 22 A11 35 A13 A12 20 21 D Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 7 9 10 11 12 13 14 15 D C79 0.1 D Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 7 9 10 11 12 13 14 15 D C77 0.1 SDRAM 64Mbit (16bit Type) IC6 SDRAM 64Mbit (16bit Type) IC3 R70 33 R69 33 R284 33 R64 33 R63 33 R62 33 R283 33 R282 33 VSS VSS VSSQ VSSQ VSSQ VSSQ VDDQ VDDQ VDDQ VDDQ VDD VDD VDD + D 3.3 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VSS VSS VSSQ VSSQ VSSQ VSSQ VDDQ VDDQ VDDQ VDDQ VDD VDD VDD + D 3.3 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NOR-Flash XCSFL D 54 28 52 6 46 12 43 C29 0.01 9 C28 0.01 49 C27 0.1 3 C26 0.1 27 C24 0.1 14 C23 0.01 1 C20 0.1 C19 10 1 8 2 7 3 6 4 5 2 4 5 RA93 47 7 8 1 8 2 7 3 6 4 5 10 11 RA92 47 13 42 1 8 2 7 3 6 4 5 44 45 RA89 47 47 48 1 8 2 7 3 6 4 5 50 51 RA86 47 53 D 54 28 52 6 46 12 43 C12 0.01 9 C11 0.01 49 C10 0.1 3 C7 0.1 27 C6 0.1 14 C5 0.01 1 C3 0.1 C2 10 1 8 2 7 3 6 4 5 2 4 5 RA81 47 7 1 8 2 7 3 6 4 5 8 10 11 RA79 47 13 1 8 2 7 3 6 4 5 42 44 45 RA76 47 47 1 8 2 7 3 6 4 5 48 50 51 RA73 47 53 XWX16CS XUSBCCS XMDDATA XSMNDCTL XNDBUS XLCDDL XCVD D D1 D0 D2 D3 D4 D5 D6 BD8 D7 D8 D9 D10 D11 D12 D13 D14 D15 D D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 WX(16bit) USBC NAND-Control NAND-Flash LCD-Data Contrast XICIORD XRD IC12A HD74LV08AT 2 1 3 C85 0.1 10 XBWE1 XBWE0 XBWE1 XBRD 13 XCE2B IC12D HD74LV08AT 12 XCE1B XRD XWE1 XWE0 XUSBCCS XCARD_SELECT XCS6B XCS0 XCS4 XCARD_SELECT XCS6B XCS0 D0 D1 D3 D2 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 + D 3.3 A7 A6 A5 A4 A3 A2 A1 A0 + D 3.3 A15 A14 A13 A12 A11 A10 A8 A18 IC14E HD74LV32AT 14 7 + D 3.3 9 IC22B HD74LV08AT 5 4 12 13 9 10 4 5 1 2 RA96 22 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 RA94 22 RA90 22 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 RA87 22 A[25..0] BD[15..0] D[31..0] IC12E HD74LV08AT D C86 0.1 8 IC18C HD74LV32AT 6 10 9 11 D HD74LV32AT 10 9 IC14C 5 IC14B 4 2 IC14A 1 IC11B HD74LV21ATELL IC11A 10 DIR 1 OE 19 A1 A2 A3 A4 A5 A6 A7 A8 2 3 4 5 6 7 8 9 D 20 C25 0.1 + D 3.3 10 DIR 1 OE 19 A1 A2 A3 A4 A5 A6 A7 A8 2 3 4 5 6 7 8 9 D 20 C14 0.1 + D 3.3 10 DIR 1 OE 19 A1 A2 A3 A4 A5 A6 A7 A8 2 3 4 5 6 7 8 9 D 20 C4 0.1 + D 3.3 10 DIR 1 OE 19 A1 A2 A3 A4 A5 A6 A7 A8 2 3 4 5 6 7 8 9 D 20 C1 0.1 + D 3.3 D 14 7 C87 0.1 + D 3.3 R55 NIU 8 XCS6B 8 R45 22 6 R44 33 3 R42 33 8 R36 33 6 D HD74LV245ATELL GND B8 B7 B6 B5 B4 B3 B2 B1 11 12 13 14 15 16 17 18 VCC IC8 D HD74LV245ATELL GND B8 B7 B6 B5 B4 B3 B2 B1 11 12 13 14 15 16 17 18 VCC IC7 D HD74LV245ATELL GND B8 B7 B6 B5 B4 B3 B2 B1 11 12 13 14 15 16 17 18 VCC IC5 D HD74LV245ATELL GND B8 B7 B6 B5 B4 B3 B2 B1 11 12 13 14 15 16 17 18 VCC IC4 IC22E HD74LV08AT D 14 7 + D 3.3 XBRD XBWE1 XBWE0 RA97 33 1 8 BD0 2 7 BD1 3 6 BD2 4 5 BD3 1 8 BD4 2 7 BD5 3 6 BD6 4 5 BD7 RA95 33 RA91 33 1 8 BD8 2 7 BD9 3 6 BD10 4 5 BD11 1 8 BD12 2 7 BD13 3 6 BD14 4 5 BD15 RA88 33 RA85 33 1 8 BA7 2 7 3 6 BA5 4 5 BA4 1 8 BA3 2 7 BA2 3 6 BA1 4 5 BA0 RA84 33 RA77 33 1 8 BA15 2 7 BA14 3 6 BA13 4 5 BA12 1 8 BA11 2 7 BA10 3 6 BA9 4 5 BA8 RA74 33 IC18E HD74LV32AT 14 7 C88 0.1 + D 3.3 IC18D HD74LV32AT D 13 12 XBRD XBWE1 XBWE0 D C89 0.1 (NotUse) Area6 11 (Ex.WX) Control Grobal Area-0/4/5/6 Control Buffer RA166 10k 1 8 BD0 2 7 BD1 3 6 BD2 4 5 BD3 RA165 10k 1 8 BD4 2 7 BD5 3 6 BD6 4 5 BD7 RA164 10k 1 8 2 7 BD9 3 6 BD10 4 5 RA163 10k 1 8 BD12 2 7 BD13 3 6 BD14 4 5 BD15 1 2 3 4 5 6 7 8 9 10 BA7 BA6 BA5 BA4 BA3 BA2 BA1 BA0 1 2 3 4 5 6 7 8 9 10 BA15 BA14 BA13 BA12 BA11 BA10 BA9 BA8 D 14 7 IC11C HD74LV21ATELL + D 3.3 + D 3.3 + D 3.3 RA13 10k + D 3.3 RA6 10k + D 3.3 SH3 2 1 XCS2 XCARD_SELECT XBBIOIS16 XWE3 XWE2 XWAIT D 5 3 IC15 TC7SH32FU 4 C51 0.1 + D 3.3 R16 0 XFLRST 6 IC18B D 2 IC18A 1 D 13 IC14D 12 XCE2A XCE1A 5 6 IC12B XWXINT XWE0 XRD CKIO XDACK0 XDREQ0 R43 33 D D R17 NIU C13 100p D XBRD XBWE0 XCSFL BA1 BA2 BA3 BA4 BA5 BA6 BA7 BA8 BA9 BA10 BA12 BA11 BA13 BA14 A16 A17 A19 A20 XCARD_SELECT D 5 4 3 11 4 D C63 15p XCS2B D S29AL004D70TFI020 VSS BYTE RESET 12 47 RY/BY 15 OE 28 WE 11 CE 26 A7 A6 A5 A4 A3 A2 A1 A0 18 19 20 21 22 23 24 25 A15 A14 A13 A12 A11 A10 A9 A8 1 2 3 4 5 6 7 8 A16 48 A18 A17 16 17 A19 9 IC2 XBIOIS16 XICIOWR XICIORD XCE2A XCE1A XPCMCIA-WAIT XWXWAIT XWXINT XWE0 XRD CKIO XDACK0 XDREQ0 XCS2B VSS NOR Flash 4Mbit VCC NC NC NC DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 46 27 C8 0.1 37 + D 3.3 13 14 10 29 BD0 31 BD1 33 BD2 35 BD3 38 BD4 40 BD5 42 BD6 44 BD7 30 32 34 36 39 41 43 45 BA0 BA[15..0] BD[15..0] D C9 EEE-S@SR 10/16 BA[15..0] 37 D BB B DD D 11 1 15 4 2341234 7658765 BB DD 91 03 B D 1 2 B D 1 BB BB DD DD 11 91 12 03 23412 B D 1 7 8 5 6 7 8765876 2345678 AAAAAAAA 12345678 B B B8 7 VCC B 6 B 5 B 4 B 3 B 2 1 6 1 19 DO IE GND R 12 3 13 2 14 1 15 4 16 3 17 2 18 1 RA9 22 BB B BBBDD D DDD46 5 234123 123 6 7 8 5 6 7 8 11 35 98 C3 89 65 C3 56 13 C4 23 79 C4 13 C35 6 C37 8 C39 2 C43 4 C46