2 Connecting to SIEMENS PLCs 2-4 Supported Registers 2-4 Supported Registers 2-4-1 SIEMENS S7-200 2 2-4-1 SIEMENS S7-200 Note The initial addresses of VW and VD must be even. Address format description: D: decimal, O: octonary, H: hexadecimal.
NB-series Programmable Terminals Host Connection Manual (V108) 2-27 Device Bit Address Word Address Format Notes SCR Nodes S.B 0.0~31.7 ------ DD.O Special Memory Bit SM.B 0.0~549.7 ------ DDD.O Counter Bit Cnt 0~255 ------ DDD.O Counter Bit Tim 0~255 ------ DDD.O Variable Memory Nodes V.B 0.0~10238.7 ------ DDDDD.O Internal Memory Bit M.B 0.0~31.7 ------ DD.O Discrete Output and Map Register Nodes Q.B 0.0~15.7 ------ DD.O Discrete Input and Map Register Nodes I.B 0.0~15.7 ------ DD.O Analog Output ------ AQW 0~62 DD Analog Input:
------ AIW 0~62 DD SCR (32-bit) ------ SD 0~28 DD SCR ------ SW 0~30 DD Special Memory Registers (32-bit) ------ SMD 0~546 DDD Special Memory Registers ------ SMW 0~548 DDD Internal Memory Bit (32-bit) ------ MD 0~28 DD Internal Memory ------ MW 0~30 DD Discrete Output and Map Registers (32-bit) ------ QD 0~12 DD Discrete Output and Map Registers ------ QW 0~14 DD Discrete Input and Map Registers (32-bit) ------ ID 0~12 DD Discrete Input and Map Registers ------ IW 0~14 DD Counter PV ------ Cnt 0~255 DDD Timer PV ------ Tim 0~255 DDD Variable Memory (32-bit) ------ VD 0~10236 DDDDD Variable Memory ------ VW 0~10238 DDDDD