Chapter 1: Introduction P3TDLR Quick Reference Jumpers Description Default Setting JBT1 CMOS Clear (p. 2-18) Pins 1-2 (Normal) JP1 SCSI (p. 2-19) Pins 1-2 (Enabled) JP2 Front Side Bus Speed (p. 2-17) Pins 1-2 (Auto) JP7 Overheat Alarm (p. 2-18) Closed (Enabled) JP8 LAN1 Enable/Disable (p. 2-18) Open (Enabled) JP11 Power Supply Fail (p. 2-11) Pin 4 (Reset) JP12 Power Supply Fail (p. 2-11) Closed (Enabled) JP13 Speed for 64-bit PCI (2-17) Closed (33 MHz) JP24 LAN2 Enable/Disable (p. 2-18) Open (Enabled) JP62 Onboard VGA (p. 2-19) Pins 1-2 (Enabled) J210 Watchdog Reset (p. 2-19) Open (Disabled) Introduction DIP Switches Description Default Setting SW1(1-4) CPU Core/Bus Ratio (see p.
2-16) Connectors Description ATX Power 24-pin ATX Power Connector (p. 2-11) DIMM0-DIMM3 Memory (SDRAM) Slots (p. 2-9) COM1/2 COM1/COM2 Serial Port Connector (p. 2-14) CPU FAN (2 ea) CPU1/CPU2 Fan Header (p. 2-14) Fan Headers (5 ea) Chassis, thermal and blower (p. 2-14) J23/J24 IDE Hard Disk Drive 1/2 Connectors (p. 2-20) J26 Floppy Disk Drive Connector (p. 2-20) J28 PS/2 Keyboard/Mouse (p. 2-9) J105/106 USB3/USB4 (p. 2-15) JA1 Ultra160 LVD SCSI Connector (p. 2-21) JF1 Front Control Panel (p. 2-4) JP61 PWR_LED (p. 2-4) LAN1/2 Ethernet Ports 1/2 (p. 2-15) SLED1 SCSI LED header (p. 2-15) USB 1/2 Universal Serial Bus 1/2 Ports (p. 2-15) WOL Wake-on-LAN Header (p.
2-16) WOM Wake-on-Modem Header (p. 2-16) 1-5