1.3 ARITHMETIC MANIPULATIONS GLOSSARY - ACCUMULATOR: 8-BIT CENTRAL REGISTER IN THE MICROPROCESSOR. BINARY ADDITION WITH CARRY OUTPUT b, 0 0 b 2 0 SUM CARRY MOST INFORMATION HAS TO GO THROUGH IT. - ADDRESS: 16 BIT POINTER TO A MEMORY LOCATION. THE 6502 MICRO- 1 0 0 1 1 0 0 0 0 PROCESSOR CAN ADDRESS 65, 536 SUCH LOCATIONS (WHICH IS2 16 ). - ARITHMETIC LOGIC UNIT (A.L.U.): A SECTION OF THE MICROPROCESSOR 1 1 1 1 WHICH CARRIES OUT ARITHMETIC (ADDITION,SUBTRACTION, BINARY ADDITION WITH CARRY FROM RIGHT INCREMENT, DECREMENT & COMPARE) AND LOGIC ("AND","EOR", "OR", & BIT SHIFTS) MANIPULATIONS. THIS IS THE ONLY PART OF ' THE MICROPROCESSOR WHICH ALTERS DATA. - COMMAND:
THE MONITOR FUNCTIONS M,G,P,R,L,S,t',l. - DATA: INFORMATION FOR THE PROCESSOR THAT DOES NOT HAVE TO BE INPUT CARRY SUM OUTPUT CARRY TO LEFT bi 0 0 b 2 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 1 1 0 TRANSLATED, e.g. "AD" AS DATA ACTUALLY MEANS 10x16+13x1 = 173 1O WHEREAS THE INSTRUCTION "AD" GETS TRANSLATED INTO THE 1 0 1 1 1 1 1 0 0 1 0 OPERATION "LOAD ACCUMULATOR ABSOLUTE". - EPROM: ERASABLE PROGRAMMABLE READ ONLY MEMORY. THIS TYPE 1 1 1 0 1 1 1 EXPOSING THE CHIP TO ULTRAVIOLET LIGHT. - FLAGS: ONE BIT INTERNAL REGISTERS. ALL SEVEN FLAGS CAN ALSO BE OF MEMORY IS LIKE A PROM, BUT CAN AGAIN BE ERASED BY 1 1 TREATED AS SEPARATE BITS OF THE P REGISTER (PROCESSOR STATUS). - INDEX REGISTER:
A REGISTER WHICH CAN BE USED TO MODIFY AN EXAMPLE: 00111100 3C 16 60i O 01011010+ 5A 16 + 90io + 10010110 96 16 150,0 IN ORDER TO MAKE LONGER ADDITIONS EASIER TO PROGRAM,THE MICROPROCESSOR HAS A CARRY BIT (FLAG). AT THE START OF AN ADDITION THIS IS TREATED AS THE INPUT CARRY, AND AT THE END IT ADDRESS (USED IN REFERRING TO DATA) BY BEING ADDED TO IT, THUS ACCESSING A CERTAIN ELEMENT OF A TABLE. THE 6502 HAS TWO INDEX REGISTERS CALLED X & Y . - INSTRUCTION: A FUNCTION OF THE MICROPROCESSOR LIKE LOAD AND RECEIVES THE CARRY OUT FROM THE SUM AT BIT 7: ASSUMING WE HAVE A CARRY INPUT: STORE. - I/O: INPUT/OUTPUT.
THIS CHIP ALLOWS YOU TO COMMUNICATE WITH THE 195,0 165,0 _Jio+ 361,0 CARRY OUT QJ 01101001 SUBSTRACTION OPERATES IN A SIMILAR MANNER, EXCEPT THAT THE CARRY (OR BORROW) FLAG OPERATES UPSIDE DOWN: A 0 CARRY FLAG IS TREATED AS REPRESENTING A BORROW FROM THE PREVIOUS STAGE: 11000011 10100101 CARRY IN C3 16 A5 16 - l i e 169,6 LINES WHICH CAN EITHER BE OUTPUTS OR INPUTS. IT ALSO HAS 128 BYTES OF RAM. - IRQ: INTERRUPT REQUEST. IF FLAG I (INTERRUPT DISABLE) IS CLEAR AND OUTSIDE WORLD. IN THE ACORN THE I/O CHIP HAS 16 PROGRAMMABLE A REQUEST IS MADE THE PROCESSOR WILL ATTEND TO IT AFTER SETTING FLAG I AND STORING THE PROGRAM COUNTER AND STATUS REGISTER. - JUMP:
THE PROGRAM COUNTER IS LOADED WITH A NEW ADDRESS. THE 11111111 FF 16 255 10 00, 6 000, 0 J 010 510io Q] 11111110 1FE 16 NOT QUITE THE RESULTS ONE MIGHT HAVE WISHED FOR! (SUPERFICIALLY) THIS OCCURS BECAUSE OF THE HARDWARE IMPLEMENTATION OF SUBTRACTION A SUBTRACTION, (P-Q), IS REGARDED BY THE MICRO- PROCESSOR AS THE EQUIVALENT (P+(-Q)), BECAUSE THERE IS A SIMPLE WAY TO GENERATE THE NEGATIVE OF A NUMBER. THE 'ONES-COMPLEMENT'OF A BINARY NUMBER IS SIMPLY GENERATED BY EXECUTION OF THE PROGRAM, WHICH IS NORMALLY USING CONSECUTIVE ADDRESSES, CONTINUES (JUMPS) AT THIS NEW ADDRESS. - LOAD: TRANSFERS THE DATA OF A MEMORY LOCATION TO AN INTERNAL REGISTER. - MNEMONIC:
SUGGESTIVE ABBREVIATION OF AN INSTRUCTION e.g. THE INSTRUCTION "LOAD ACCUMULATOR ABSOLUTE" HAS THE MNEMONIC "LDA". -NMI: NON MASKABLE INTERRUPT WHEN THE NON MASKABLE INTERRUPT IS ACTIVATED THE PROCESS Wl LL SET FLAG I, STORE AWAY ITS PROGRAM COUNTER AND STATUS REGISTER AND THEN IMMEDIATELY ATTEND TO THE INTERRUPT. THERE IS NO WAY OF PREVENTING THIS EXCHANGING '0's & Ts: T s 000011002 0Cie 12,o COMPLEMENT 11110011 2 F3 16 243 10 IF THIS ONE'S-COMPLEMENT IS TO BE THE NEGATIVE OF A NUMBER, WE SHOULD GET 0 ON ADDITION: INTERRUPT. IT HAS PRIORITY OVER IRQ. -OPCODE: HEXADECIMAL REPRESENTATION OF AN INSTRUCTION.e.g.
THE INSTRUCTION "LOAD ACCUMULATOR ABSOLUTE" HAS THE MNEMONIC "LDA" AND THE OPCODE "AD".