Index A Address (AD) Bus 3-1 Addressing modes 5-3 Agency Approvals 2-3 ALE (address latch enable) 3-3 Allow bits 5-22 Alter Memory 6-4,6-6 Auto-boot 6-1,6-3, B Buffered Data (BD) Bus 3-1,3-3,5-13 Bus Architecture 3-1 Byte Offset Conversion 5-41 C Chip Select 5-4 Chip Select Register Offsets 5-5 Concurrent CP/M 1-3 Control Bits 5-23 Control Port Address Offsets 5-23 CPU Board Block Diagram 4-1 CPU Jumpering Locations A-I CPU Jumpering Specification A-I D Debugger Command Syntax 6-6 Debugger Program 6-2,6-4 Debugger Support Commands 6-4 Default Base Address 5-4 Diag-console Controller (8274) Test 6-18,6-23 Diagnostics 1-3 Direct Memory Access (DMA) Operation 5-4 Disk Data Format 5-40 Display/Change/Clear Breakpoint 6-6 Display/Change Register Contents 6-7 Display Memory Contents 6-7 DMA Channel Transfer 4-3 DMA Operation 5-4 DMA Register Offsets 5-5 E Electric State Discharge Dissipation 2-3 Entering the Debugger Program 6-5 Environmental Requirements Floppy Disk 2-5 Hard Disk 2-7 System 2-2 Executing a Debugger Command 6-5 1-1