The last step is to generate a "Channel Attention" signal to the controller. This operation will start the controller. When acti- vation is complete, the controller will store the firmware version number (guaranteed not to be zero) in the first location of the Controller Control Block. At this point, the controller is ready to accept commands. Commands to the controller are controlled by seven registers within the CCB. The process that reads the command registers is generally in a quiet (not asleep) state. During this time, it will read the "New Command Register". If it finds that this register has not changed, it will exit without checking the system or channel command registers.
Host/Controller Communication When the "New Command Register" has changed, the process will individually test the command registers, and, if there is a command pending, activate the appropriate process to service the request. This mechanism is very efficient in the general case (when no commands are pending), but does demand the proper sequencing of events. Any time the 80186 issues a command, it must al,ter the value in the "New Command Register". (The recommended procedure is to increment the val ue after each command.) The controller will acknowledge receipt of a command by clearing bit 7 of the command byte.
While there is generally no reason to wait for the acknowledgement after issuing a command (see note below), it is essential that bit 7 be tested before issuing a new command. The procedure then becomes the following: Test if last command still pending or loop if true> Set new parameters (if required for command) Issue new command Increment "New Command Register" Exit NOTE Channel status for a given channel is not val id whil e a command is pending. Controller Initialization After activation, the controller is in an idle state waiting for the system command to enable the controller. Issue the command. At this time, controller interrupts may be enabled. 5-28