Appendix B: BIOS POST Codes Appendix B BIOS POST Codes This section lists the POST (Power On Self Test) codes for the PhoenixBIOS. POST codes are divided into two categories: recoverable and terminal. Recoverable POST Errors When a recoverable type of error occurs during POST, the BIOS will display an POST code that describes the problem. BIOS may also issue one of the follow- ing beep codes: 1 long and two short beeps - video configuration error 1 repetitive long beep - no memory detected 1 long continuous beep (with OH LED on) - system overheat Terminal POST Errors If a terminal type of error occurs, BIOS will shut down the system.
Before doing so, BIOS will write the error to port 80h, attempt to initialize video and write the POST Code Description 02h Verify Real Mode 03h Disable Non-Maskable Interrupt (NMI) 04h Get CPU type 06h Initialize system hardware 07h Disable shadow and execute code from the ROM.
08h Initialize chipset with initial POST values 09h Set IN POST flag 0Ah Initialize CPU registers 0Bh Enable CPU cache 0Ch Initialize caches to initial POST values 0Eh Initialize I/O component 0Fh Initialize the local bus IDE 10h Initialize Power Management 11h Load alternate registers with initial POST values 12h Restore CPU control word during warm boot 13h Reset PCI Bus Mastering devices 14h Initialize keyboard controller 16h 1-2-2-3 BIOS ROM checksum 17h Initialize cache before memory Auto size B-1