7 Application Instructions API 50-99 API 62 Operands: S 1 : Start device in the data table S 2 : No. of counter D : Start No. of the devices for the comparison results n : Number of data for comparison Explanations: 1. When S 1 designates KnX, KnY, KnM and KnS, the 16-bit instruction has to designate K4 and 32-bit instruction has to designate K8. 2. For SA/SX/SC series MPU, S 2 only supports C device. 3. Range of n : 1 ~ 64 4. See the specifications of each model for their range of use. 5. ABSD instruction is for the absolute control of the multiple output pulses generated by the present value in the counter. 6. S 2 of DABSD instruction can designate high speed counters.
However, when the present value in the high speed counter is compared with the target value, the result cannot output immediately owing to the scan time. If an immediate output is required, please use DHSZ instruction that is exclusively for high speed counters. Program Example: 1. Before the execution of ABSD instruction, use MOV instruction to write all the set values into D100 ~ D107 in advance. The even-number D is for lower bound value and the odd-number D is for upper bound value. 2. When X10 = On, the present value in counter C10 will be compared with the four groups of lower and upper bound values in D100 ~ D107. The comprison results will be stored in M10 ~ M13. 3.
When X10 = Off, the original On/Off status of M10 ~ M13 will be remained. X10 C10 X11 X11 DVP-PLC APPLICATION MANUAL 7-51 Mnemonic Operands Function D ABSD Absolute Drum Sequencer Type OP Bit Devices Word Devices Program Steps X Y M S K H KnX KnY KnM KnS T C D E F ABSD: 9 steps DABSD: 17 steps S 1 * * * * * * * S 2 * * * D * * * n * * PULSE 16-bit 32-bit S SA SX SC E H SV EH3 SV2 ES EX SS EH3 ES EX SS EH3 ES EX S SA SX SC EH SV SA SX SC EH SV SV2 SV2 ABSD D100 C10 M10 K4 RST C10 CNT C10 K400