Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equip- ment can be attached to the computer to read I/O port 0080h. B-1 Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: B-1 Checkpoint Code Description D0h The NMI is disabled. Power on delay is starting. Next, the initialization code check- sum will be verifi ed.
D1h Initializing the DMA controller, performing the keyboard controller BAT test, starting memory refresh and entering 4 GB fl at mode next. D3h Starting memory sizing next. D4h Returning to real mode. Executing any OEM patches and setting the Stack next. D5h Passing control to the uncompressed code in shadow RAM at E000:0000h. The initialization code is copied to segment 0 and control will be transferred to segment 0.