Altos Computer Systems Altos 486 — Altos 486 System Reference Manual – Service & Technical Guide PDF (EN)

81186/Z-8BA Communications Communication between the 80186 and the Z-80A Controller is done through registers. The 24-bit register (initialization register) exists at location IFFFC (1000:FFFC). This register contains a pOinter to a group of registers. The group of registers may exist anywhere in memory. When the Controller is interrupted, the initialization register is read. From this point, initialization is accomplished according to the parameters in the register groups. The initialization register will be read only after the controller is interrupted, allowing the reserved locations to be reused by the host unless reinitialization is required. (Note:

Multi-byte registers containing 16-bit counts or 24-bit addresses are always stored in reverse order, 10 byte first, high byte last.) Z-80A PROGRAMMING Programming the Z-80A I/O Controller is described in nine sections: Controller Acti vation Host/Controller Communication Controller Initialization Channel Initialization Channel Transmit Operation Channel TTY Receive Operation Channel Ring Bufferred Receive Operation Modem Control/Status Operation Execute from XLA Bus Controller Activation After a power-up or controller hardware reset, the controller first initializes all hardware devices, clears internal RAM, and enters a tight loop.

To activate the controller, the 80186 must first generate and initialize the system and channel register arrays. (The system register array fOllowed by the eight channel register arrays form a single contiguous block that will hereafter be called the Controller Control Block or CCB.) The next step is to store the address of the Controller Control Block at XLA bus location IFFFC hex. Values must exist at location IFFFC in the following order: low mid high xxxx The first two locations of the Controller Control Block contain the val ue 00 hex. 5-27