TABLE OF CONrEftS PAGE SUBJECT TABLES 5-5 5-5 5-6 5-8 5-10 5-11 5-12 Table 5-1 Table 5-2 Table 5-3 Table 5-4 Table 5-5 Table 5-6 Tabl e 5-7 Chip Select Register Offsets DMA Register Offsets Timer Control Register Offsets Interrupt Controller Register Offsets System Maskable Interrupts Master PIC Register Offsets 80186 Microprocessor Predefined Types and Default Priority System Memory Map Memory Management Relocation Register Violation Port Bits Control Port Address Offsets Control Bits PIA Port Address Offsets Floppy Disk Control Port Address Offsets Floppy Disk Controller Port Address Off sets Z80 Port Assignments SIOA Port Address Offsets SlOB Port Address Offsets 5-13 5-14 5-22 5-23 5-23 5-24 5-25 5-25 Table 5-8 Table 5-9 Table 5-10 Table 5-11 Table 5-12 Table 5-13 Table 5-14 Table 5-15 5-25 5-26 5-26 5-26 5-28 5-40 5-41 Table 5-16 Table 5-17 Table 5-18 Table 5-19 Table 5-20 Table 5-21 Table 5-22 Z-8~A Memory Addressing Internal Hard Disk Connectors Disk Data Format Conversion from Byte Offset to Sector Number Monitor Memory Map Debugger Support Commands Debugger's Command Syntax Monitor System Calls Peripheral I/O Parameter Block Layout Peripheral I/O Parameter Block Definition Power-up Test Structure Table 6-1 Table 6-2 Table 6-3 Table 6-4 Table 6-5 Table 6-6 Table 6-7 6-3 6-4 6-6 6-13 6-16 6-17 6-18