VII. INFORMATION OF ICs 1. IC Explanation. 1-1 IC1 SA1110B (Intel CPU) 206MHz version chip. CPU clock : 176.9MHz. SDRAM (CPU work memory) :
88.45MHz (=176.9MHz/2) 1-1-2 Pin Descriptions SERVICE MANUAL 20 Signal name Dir Explanation D[31:0] i/o Data-bus A[25:0] out Address-bus SDCKE1 out SDRAM clock enable for CPU’s work memory SDCLK1 out SDRAM clock for CPU’s work memory.(88.45MHz) SDCLK2 out Not used though this is connected.(44.225MHz) /SDRAS out SDRAM RAS for CPU’s work memory /SDCAS out SDRAM CAS for CPU’s work memory /SDCS0 out SDRAM CS for CPU’s work memory DQM[3:0] out SDRAM data out mask enable for CPU’s work memory /OE out Output enable (/RD) /WE out Write enable /Cs[5:0] out Chip select RDY in Data ready signal for /CS[5:3] RD/nWR out Read/write direction control /RESET in Hard reset. Active low.
PXTAL in Input for 3.686MHz crystal (non-CMOS threshold) PEXTAL out Output for 3.686MHz crystal (non-CMOS level) GP0 in Interrupt from Voice-LSI GP1 in Interrupt from SCSI controller (FAS236U) GP2 in Interrupt from IDE GP3 in Interrupt from USB-host controller (SL811HST) GP4 in Interrupt from effect board GP5 in Interrupt from MIDI (Voice-LSI) GP6 in Interrupt from USB-function controller (NET2890) GP7 in Interrupt from SMPTE option (MPC only) GP8 in Interrupt from FPGA GP9 in Interrupt from Voice-LSI GP11 out Initialize FPGA. active high. GP13 out DIMM SPDA for reading information. GP14 out DIMM SPCL for reading information. GP15 out LCD DISP off.
Active low.(MPC only) GP16 in SCSI jack board recognition. Low=connected. GP17 out Control /PROGRAM pin of FPGA during configuration GP18 in effect board recognition. Low=connected. GP19 in FPGA /INIT. used during configuration. GP20 out D/A converter CDTI (control data input) GP21 in FPGA done. used during configuration. GP22 out Used for ROM emulator. GP23 out CPLD TDI. used during configuration in factory. GP24 out CPLD TMS. used during configuration in factory. GP25 out CPLD TCK. used during configuration in factory. GP26 in 8 Para board recognition. Low=connected. GP27 in CPLD TDO. used during configuration in factory. RxD 1 _ in DIO board recognition. Low=connected.
TxD 1 _ in SMPTE board recognition. Low=connected. RxD 2 _ in RxD. from panel(remocon) 230.4kbps. TxD 2 _ out TxD. to panel(remocon). 230.4kbps. RxD 3 _ in ADAT board recognition. Low=connected. TxD 3 _ in for future. (Low When ADAT board is exist now) RxD C _ in CD analog recognition. Low=connected.(MPC only)