User Guide of EM730 Series Inverter 67 F02.15 Positive/negative logic 1 of digital input terminal D7 D6 D5 D4 D3 D2 D1 D0 00000 〇 * * * X5 X4 X3 X2 X1 0: positive logic, valid in the closed state/invalid in the open state 1: Negative logic, invalid in the closed state/valid in the open state F02.16 Positive/negative logic 2 of digital input terminal D7 D6 D5 D4 D3 D2 D1 D0 00 〇 * * * * * * AI2 AI1 0: positive logic, valid in the closed state/invalid in the open state 1: Negative logic, invalid in the closed state/valid in the open state F02.17 Filtering times of digital input terminal 0-100, 0: no filtering; n:
sampling every n ms 2 〇 F02.18 X1 valid delay time 0.000-30.000 s 0.000 ● F02.19 X1 invalid delay time 0.000-30.000 s 0.000 ● F02.20 X2 valid delay time 0.000-30.000 s 0.000 ● F02.21 X2 invalid delay time 0.000-30.000 s 0.000 ● F02.22 X3 valid delay time 0.000-30.000 s 0.000 ● F02.23 X3 invalid delay time 0.000-30.000 s 0.000 ● F02.24 X4 valid delay time 0.000-30.000 s 0.000 ● F02.25 X4 invalid delay time 0.000-30.000 s 0.000 ● F02.26 Minimum input pulse frequency 0.00 to maximum input pulse frequency F02.28 kHz 0.00 ● F02.27 Minimum input setting –100.0 - +100.0 % 0.0 ● F02.28 Maximum input pulse frequency 0.01~100.00 kHz 50.00 ● F02.29 Maximum input setting –100.0 - +100.0 % 100.0 ● F02.30 Pulse input filtering time 0.00 - 10.00 s 0.10 ● F02.31 Options of analog input function Ones place:
AI1 0: analog input 1: digital input (0 below 1V, 1 above 3V, the same as last time under 1-3V) Tens place: AI2 0: analog input 1: digital input (the same as above) 00B 〇