Ramsey UT5A Ultimate 555 Timer Kit Manual — User Guide PDF (EN)

INTRODUCTION The UT5A is most versatile 555 timer kit on the market. The input circuit op- tions allow for connecting to almost any kind of digital signal. The output driv- ers allow for connection to digital circuits, relays, indictors, etc... It is designed to provide the easiest way to apply accurate timing signals to almost any ap- plication. The UT5A is also an excellent teaching tool. The detailed theory of operation will arm you with the knowledge to effectively set up and use the 555 timer. You will have the chance to experiment with the 555 timer IC, transistor switches, pull-up resistors, limiter, and differentiator circuits.

In addition, experienced 555 IC users will welcome the practical and truly uni- versal setup of the PC board. THEORY OF OPERATION Theory Intro: The UT5A is made up of many small circuits used to control the 555 timer IC, which is the heart of the kit. First we’ll cover these circuits individually, then we’ll place them into the two most basic modes of operation (monostable and astable) and analyze their operation. Power Entry: The UT5A requires an external 5 to 15 VDC DC power supply to operate the timer circuits. This external DC supply is connected through J1, positive at pin 1 and negative (GND) at pin 2.

J1 pin 3 allows for a separate 3 to 24 VDC supply to be used to set the output signal amplitude parameters or Output Power. JMP1 allows the Timer Power to be used for Output Power. Input Circuits: Triggering the 555 timer IC requires a negative going signal applied to its input. We have three ways to apply this signal to the IC. 1) NEGATIVE INPUT - If the source signal is negative going it can be applied to J2 pin3 the boards (-) Input which is attached to C1. For this option JMP2 (Pull-up Select) may or may not be installed depending on the source. If installed, it supplies VCC through R1 to C1’s input. J2 pin3 allows us to bring a negative signal into the timer at C1.

With a negative input, D1 is turned off, thus preventing Q1 from effecting the input signal. 2) POSITIVE INPUT - This option requires JMP2 (the Pull-up Select) to be installed to provide power for Q1. The positive pulse enters through J2 pin 1 (+ Input) current limiting resistor R2 to the base of Q1. The positive signal turns on Q1. It amplifies and inverts the signal, and now we have a negative going pulse passed by the steering diode D1 to C1’s input. UT5A  4

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3) START SWITCH INPUT - We can also generate a negative signal using Start switch S1. This final option also requires JMP2 (Pull-Up Select) to be installed. Pull-up resistor R1 keeps a High (+VCC) at S1/C1 junction with no input signal applied to J2 pin3. When S1 is pressed it pulls S1/C1 junction low, giving us a negative pulse at C1’s input. Differentiator Circuit and Limiter: If the input pulse has a long negative duration, it can override the 555 timer’s output. In most cases this is not desirable, however if it is then you can install JMP3 (Differentiator Select). When JMP3 is not installed, C1 and R3 act as a differentiator circuit.

This circuit will turn an input square wave or long duration pulse into a negative and positive short duration pulse. Pulse width is determined by C1’s charge or discharge path. Since R3 is tied to VCC the junction of C1/R3 will rest at VCC. The short duration pulses will be imposed on that DC level. The negative short duration pulse will have an amplitude slightly less than the original pulse. The positive short duration pulse will have its amplitude limited by D2 to a maximum of VCC + 0.7V. This is to prevent false operation of the timer IC. JMP2 (Input Select) must be installed for any circuit requiring an external trigger input. Charging Network:

R4, R5, R6, R7, and C2 make up the RC network responsible for all timing in the UT5A. The component values determine the rate at which the capacitor (C2) charges and discharges. JMP6 controls the way the charging network is connected to the timer IC. JMP6 also determines the mode of operation, which we will discuss later. Timer Pin-out and Function: The 555 timer IC has 8 pins. Pin1 provides Ground to all timer functions. Pin8 is +VCC and provides power for all IC functions. Pin3 is the Output pin; it will be either High (near +VCC) or a Low (near 0 VDC) depending on the status of the input pins.

Pin7 is called Discharge, it will provide ground to the charging network when the Output ( Pin3 ) is Low and an open when the Output is High. Pin2 is the Trigger input. When the voltage on this pin falls below the trigger level (usually 1/3 VCC) it will cause the Output ( Pin3 ) to go High and remove the ground from Discharge ( Pin7 ). UT5A 5

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Pin6 is called the Threshold input. When the voltage on this pin rises above the Threshold Level (usually 2/3 VCC) it cause, the Output to go Low and place, a ground in the charging network through the Discharge ( Pin7 ). Pin4 is the Reset. When this pin goes low it will override the other inputs and force the Output to go Low and the Discharge to provide a ground to the charging network. Pin5 is the Control Voltage. This pin allows the Trigger and Threshold levels to be independent of VCC. When this pin is connected the Threshold level will be equal to the Control Voltage pin (J3 pin1) and the Trigger level will be Ѕ Control Voltage pin. Reset Circuit:

The Reset circuit consists of R11, C6, J3 pin3 (Reset Input) S2 and U1 pin4. R11 is a pull-up resistor that keeps the timer’s RESET pin normally High. C6 is a filter capacitor to ensure that noise doesn’t accidently reset the timer IC. S2 is a normally open push button switch that when closed pulls U3 pin4 low, resetting the timer IC. J3 allows for an external reset of the timer IC. Control Voltage Circuit: The control voltage circuit is used to change the trigger levels of the timer as mentioned in Timer Pin-out and Function . It also can be used for pulse width and pulse position modulation. C4 is a filter capacitor that ensures noise does not effect timer operation.

R8 allows the Control Voltage to be set to any value between 0 and +VCC. JMP5 allows R8’s wiper voltage to be applied to the timer IC. J3 pin1 allows for an external Control Voltage. This voltage can be any voltage up to +VCC AC or DC. JMP5 should not be installed if an external Control Voltage is being used. With JMP5 removed and no input on J3 pin1, the 555 timers Trigger and Threshold voltages are at their default 1/3 VCC and 2/3 VCC values respectively. Timer Output Circuits: The Inverted Timer Output circuit consists of current limiting resistor R9, pull- up resistor R10, protection diode D3, and transistor Q2.

The Non-inverted Timer Output consists of JMP7 the Non-Invert jumper, R12 pull-up resistor, protection diode D4, and transistor Q3. The output of the timer chip U1 pin3 is connected to Q2 through current limiting resistor R9. If U1’s pin3 output is Low the base of Q2 is Low, which turns it off. This allows pull-up resistor R10 to pull Q2’s collector High. If JMP7 is removed this High (approximately +V) is applied to J5 pin2 as the Inverted Timer Output. If JMP7 is installed this high (approximately +0.7VDC) is applied to the base of Q3. This causes Q3 to turn on pulling, its collector UT5A 6

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low (approximately 0VDC). The Low appears at J4 pin 1 as the Non-inverted Timer Output. If U1’s pin3 output is High, the base of Q2 is High, causing it to be turned on. This pulls Q2’s collector Low, and this Low (approximately 0VDC) is applied to J5 pin2 as the Inverted Timer Output. If JMP7 is installed, this Low (approximately 0VDC) is applied to the base of Q3, turning it off. This allows pull-up resistor R12 to pull Q3’s collector High (approximately +V). The High appears at J4 pin 1 as the Non-inverted Timer Output. The Inverted Timer Output at J5 pin2 and Non-Inverted Timer Output at J4 pin1 can be used as logic level outputs.

A Low is less than 200mV and a High is from +3 to +24V, depending on the supply voltage used for V+. They also can be used to drive a load of up to 200mA if the load is connected between +V pin at J4 pin2 and either of the Timer Output pins. To have the load active when the timer’s output at U1 pin3 is High, connect the load between J4 pin2 and J5 pin2. To have the load active when the timer’s output at U1 pin3 is Low connect the load between J4 pin2 and J4 pin1. D3 and D4 protect Q2 and Q3 respectively from inductive kick if an inductive load is used. MODES OF OPERATION Note: For these explanations we will assume no Control Voltage input. Only basic operation is covered here.

Monostabe Mode: In Monostable mode the timer acts as a “one shot” pulse generator. It has one Stable and one Unstable state. The pulse begins with a negative input trigger. This causes the output of the 555 timer to go from low to high starting the pulse (Unstable). The Pulse Width is determined by the charging network’s RC time constant. When the circuit times out the output of the 555 timer goes from high to low completing the pulse (Stable). The timer will remain in this Stable state until it is triggered again. In Monostable mode the 555 timer requires an external negative pulse or spike to start its operation.

We will be using the pulse provided by the Input, Differentiator, and Limiter circuit previously described. This means JMP4 (Input Select) must be installed. JMP6 (Mode Select) set to pins 1 and 2 prepares the Charging Network for Monostable operation. The C2’s charge path can be traced by starting at +VCC down through R4, R5, to the pin7 (Discharge) of the timer IC, through JMP6 pin1 to pin2, to C2. You may notice that R6 and R7 are bypassed in this mode. C2 is also directly connected to pin6 (Threshold) of the timer IC. When C2 is charging the Monostable is in its Unstable state. C2 is allowed to charge when U1 pin3 (Output) is High and pin7 (Discharge) is providing an UT5A 7

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