service routine for each interrupt. Table 5-7 shows the 80186 Microprocessor predefined types and default priorities. The Microprocessor then multiplies the 8-bit vector by four which becomes the address in a vector table. The significant five bits of the vector are user-programmable while the lower three bits are generated by the priority logic. These bits represent the encoding of the priority level requesting service. The significant five bits of the vector are progammed by writing to the interrupt vector register at offset 20H.
Table 5-6 Master PIC Register Offsets I Address (HEX) I Function I Type I 1-----------------1-----------------------1--------------------1 I 2C0 H I READ OR WRITE I CONTROL I I 2C2H I READ OR WRITE I CONTROL I I I I I Table 5-7 80186 Microprocessor Predefined Types and Default Priority I I IInterrupt Name I 1----------------- IDivide Error I Exception ISingle step I Interrupt INMI IBreakpoint I Interrupt IINTO Detected I Overflow I Exception IArray Bounds I Exception IUnused-Opcode I Exception IESC Opcode I Exception I ITimer 0 interrupti ITimer 1 interrupti ITimer 2 interrupti IReserved I IDMA 0 interrupt I IDMA 1 interrupt I IINTO interrupt I I INTI interrupt I IINT2 interrupt I IINT3 interrupt I Vector I Default I Related Type I Priority I Instructions ------------------- ------------------------ 0 *1 DIV ,1DIV 1 12**2 All 2 1 All 3 *1 INT 4 *1 INTO 5 *1 BOUND 6 *1 Undefined Opcodes 7 *1*** ESC Opcodes 8 2A**** 18 2B**** 19 2C**** 9 3 10 4 11 5 12 6 13 7 14 8 15 9 5-11